spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 112

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spd6722qcce

Manufacturer Part Number
spd6722qcce
Description
Isa-to-pc-card Pcmcia Controllers
Manufacturer
Intel Corporation
Datasheet

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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
112
1. The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer Set
2. The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
3. The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
4. For typical active timing programmed at 280 ns, maximum -WAIT timing is 190 ns after Command active.
5. -IOIS16 must go low within 3Tcp + 10 ns of the cycle beginning or -IOIS16 will be ignored and -CE will not be activated.
Symbol
0 default value of 01h, the setup time would be 70 ns. S = (N
page
Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
Table 32. Word I/O Read/Write Timing
t
t
t
t
t
t
t
ref
t
t
t
t
10
1
2
3
4
5
6
7
6
9
109.
-REG or Address setup to Command active
Command pulse width
Address hold and Write Data valid from Command inactive
-WAIT active from Command active
Command hold from -WAIT inactive
Card -IOIS16 delay from valid Address (PC Card specification)
-IOIS16 setup time before Command end
-CE2 delay from -IOIS16 active
Data valid from -WAIT inactive
Data setup before -IORD inactive
Data hold after -IORD inactive
2
Parameter
5
4
1
pres
N
val
3
+ 1), see
pres
(C
(R
(S
“PC Card Bus Timing Calculations” on
(2 Tcp) + 10
(3 Tcp) + 10
(2 Tcp) + 10
Tcp – 10
pres
N
Tcp) – 10
Tcp) – 10
Tcp) – 10
MIN
val
0
+ 1), see page 109.
N
val
+ 1), see page 109.
(C – 2)Tcp – 10
Tcp + 10
MAX
35
Datasheet
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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