spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 84

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spd6722qcce

Manufacturer Part Number
spd6722qcce
Description
Isa-to-pc-card Pcmcia Controllers
Manufacturer
Intel Corporation
Datasheet

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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
11.0
11.1
84
Register Name: Setup Timing 0–1
Index: 3Ah, 3Dh
Setup Prescalar Select
Bit 7
RW:00
Timing Registers
The following information about the timing registers is important:
Setup Timing 0–1
There are two separate Setup Timing registers, each with identical fields. These registers are
located at the following indexes:
The Setup Timing register for each timing set controls how long a PC Card cycle’s command (that
is, -OE, -WE, -IORD, -IOWR; see
internal clock cycles.
The overall command setup number of clocks S is programmed by selecting a 2-bit prescaling
value (bits 7:6 of this register) representing weights of 1, 16, 256, or 8192, and then selecting a
multiplier value (bits 5:0) to which that prescalar is multiplied to produce the overall command
setup timing length according to the following formula:
The value of S, representing the number of internal clock cycles for command setup, is then
multiplied by the internal clock’s period to determine the command setup time (see
Timing Calculations” on page 109
Bits 5:0 — Setup Multiplier Value
This field indicates an integer value N
7:6) to control the length of setup time before a command becomes active.
Bit 6
All timing registers take effect immediately and should only be changed when the FIFO is
empty (see the FIFO Control register on
Selection of Timing 0 or Timing 1 register sets is controlled by I/O Window Control, bit 3
and/or bit 7 (see
Index
3Ah
3Dh
Bit 5
Setup Timing
Setup Timing 0
Setup Timing 1
S = (N
“I/O Window Control” on page
pres
N
Bit 4
val
) + 1
for further discussion).
Table 2 on page
val
from 0 to 63; it is combined with a prescalar value (bits
Setup Multiplier Value
“FIFO Control” on page
Bit 3
RW:000001
20) setup will be, in terms of the number of
58).
Bit 2
Register Compatibility Type: 365
72).
Bit 1
Register Per: socket
“PC Card Bus
Datasheet
Bit 0

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