spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 4

• Manufacturer Part Number: spd6722qcce
• Description: Isa-to-pc-card Pcmcia Controllers
• Manufacturer: Intel Corporation

PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
9.0
10.0
11.0
12.0
13.0
14.0
15.0
4
8.3
8.4
8.5
8.6
8.7
Memory Window Mapping Registers
9.1
9.2
9.3
9.4
9.5
9.6
Extension Registers
10.1
10.2
10.3
10.4
10.5
10.6
10.7
Timing Registers
11.1
11.2
11.3
ATA Mode Operation
Using GPSTB Pins for External Port Control
(PD6722 only)
13.1
13.2
13.3
VS1# and VS2# Voltage Detection
DMA Operation (PD6722 only)
15.1
15.2
15.3
15.4
System I/O Map 0–1 Start Address High ............................................................ 60
System I/O Map 0–1 End Address Low .............................................................. 60
System I/O Map 0–1 End Address High ............................................................. 61
Card I/O Map 0–1 Offset Address Low ............................................................... 62
Card I/O Map 0–1 Offset Address High .............................................................. 62
System Memory Map 0–4 Start Address Low..................................................... 64
System Memory Map 0–4 Start Address High .................................................... 65
System Memory Map 0–4 End Address Low ...................................................... 66
System Memory Map 0–4 End Address High ..................................................... 66
Card Memory Map 0–4 Offset Address Low ....................................................... 67
Card Memory Map 0–4 Offset Address High ...................................................... 68
Misc Control 1 ..................................................................................................... 70
FIFO Control ....................................................................................................... 72
Misc Control 2 ..................................................................................................... 72
Chip Information.................................................................................................. 74
ATA Control......................................................................................................... 75
Extended Index ................................................................................................... 77
Extended Data .................................................................................................... 77
10.7.1 Data Mask 0–1 ....................................................................................... 78
10.7.2 Extension Control 1 (PD6722 only, formerly DMA Control) ................... 78
10.7.3 Maximum DMA Acknowledge Delay (PD6722 only) .............................. 79
10.7.4 External Data (PD6722 only, Socket A, Index 2Fh) ............................... 81
10.7.5 External Data (PD6722 only, Socket A, Index 6Fh) ............................... 82
10.7.6 Extension Control 2 (PD6722 only) ........................................................ 83
Setup Timing 0–1 ............................................................................................... 84
Command Timing 0–1......................................................................................... 85
Recovery Timing 0–1 .......................................................................................... 86
Control of GPSTB Pins ....................................................................................... 91
Example Implementations of GPSTB-Controlled Read and Write Ports............. 93
GPSTB in Suspend Mode ................................................................................... 94
DMA Capabilities of the PD6722......................................................................... 97
DMA-Type PC Card Cycles ................................................................................ 97
ISA Bus DMA Handshake Signal ........................................................................ 98
Configuring the PD6722 Registers for a DMA Transfer ...................................... 98
15.4.1 Programming the DMA Request Pin from the Card ............................... 98
15.4.2 Configuring the Socket Interface for I/O ................................................. 99
91
...................................................................................................... 84
................................................................................................ 70
.............................................................................................. 88
............................................................................ 97
.................................................................... 95
............................................................... 64
Datasheet