rtl8100l Realtek Semiconductor Corporation, rtl8100l Datasheet - Page 12

• Manufacturer Part Number: rtl8100l
• Description: Fast Ethernet Controller
• Manufacturer: Realtek Semiconductor Corporation

5.1 Receive Status Register in Rx packet header
2001-11-9
00D4h-00D7h
00D9h-00FFh
00D2h
00D3h
00D8h
12-6
Bit
15
14
13
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
-
-
-
LSBCRC6
LSBCRC7
Symbol
LONG
Config5
RUNT
MAR
PAM
BAR
ROK
CRC
FAE
ISE
-
-
-
Multicast Address Received: This bit set to 1 indicates that a multicast
packet is received.
Physical Address Matched: This bit set to 1 indicates that the destination
address of this packet matches the value written in ID registers.
Broadcast Address Received: This bit set to 1 indicates that a broadcast
packet is received. BAR, MAR bit will not be set simultaneously.
Reserved
Invalid Symbol Error: (100BASE-TX only) This bit set to 1 indicates
that an invalid symbol was encountered during the reception of this packet.
Runt Packet Received: This bit set to 1 indicates that the received packet
length is smaller than 64 bytes ( i.e. media header + data + CRC < 64
bytes )
Long Packet: This bit set to 1 indicates that the size of the received
packet exceeds 4k bytes.
CRC Error: When set, indicates that a CRC error occurred on the
received packet.
Frame Alignment Error: When set, indicates that a frame alignment
error occurred on this received packet.
Receive OK: When set, indicates that a good packet is received.
LSB of the mask byte of wakeup frame6 within offset 12 to 75
LSB of the mask byte of wakeup frame7 within offset 12 to 75
Reserved
Configuration register 5
Reserved
12
Description
RTL8100B(L)
Rev.1.41