rtl8100l Realtek Semiconductor Corporation, rtl8100l Datasheet - Page 25
rtl8100l
Manufacturer Part Number
rtl8100l
Description
Fast Ethernet Controller
Manufacturer
Realtek Semiconductor Corporation
Datasheet
1.RTL8100L.pdf
(58 pages)
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5.17 Transmit Status of All Descriptors (TSAD) Register
(Offset 0060h-0061h, R/W)
5.18 Basic Mode Control Register
(Offset 0062h-0063h, R/W)
2001-11-9
11-10
7-0
Bit
15
14
13
12
9
8
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Auto Negotiation
Duplex Mode
Restart Auto
Negotiation
Spd_Set
Enable
(ANE)
Name
Reset
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
-
-
-
This bit sets the status and control registers of the PHY(register
0062-0074H) in a default state. This bit is self-clearing. 1 = software
reset; 0 = normal operation.
Reserved
This bit sets the network speed. 1 = 100Mbps; 0 = 10Mbps. This bit‘s
initial value comes from 93C46.
This bit enables/disables the NWay auto-negotiation function. Set to
1 to enable auto-negotiation, bit13 will be ignored.
Set to 0 disables auto-negotiation, bit13 and bit8 will determine the
link speed and the data transfer mode, respectively. This bit‘s initial
value comes from 93C46.
Reserved
This bit allows the NWay auto-negotiation function to be reset.
1 = re-start auto-negotiation; 0 = normal operation.
This bit sets the duplex mode. 1 = full-duplex; 0 = normal operation.
This bit‘s initial value comes from 93C46.
If bit12 = 1, read = status write = register value.
If bit12 = 0, read = write = register value.
Reserved
Symbol
TABT3
TABT2
TABT1
TABT0
OWN3
OWN2
OWN1
OWN0
TOK3
TOK2
TOK1
TOK0
TUN3
TUN2
TUN1
TUN0
TOK bit of Descriptor 3
TOK bit of Descriptor 2
TOK bit of Descriptor 1
TOK bit of Descriptor 0
TUN bit of Descriptor 3
TUN bit of Descriptor 2
TUN bit of Descriptor 1
TUN bit of Descriptor 0
TABT bit of Descriptor 3
TABT bit of Descriptor 2
TABT bit of Descriptor 1
TABT bit of Descriptor 0
OWN bit of Descriptor 3
OWN bit of Descriptor 2
OWN bit of Descriptor 1
OWN bit of Descriptor 0
Description/Usage
25
Description
RTL8100B(L)
Default/Attribute
0, RW
0, RW
0, RW
0, RW
0, RW
-
-
-
Rev.1.41