upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 161

no-image

upd78f0114m6gb-8es

Manufacturer Part Number
upd78f0114m6gb-8es
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
(6) Operation of OVF00 flag
(7) Conflicting operations
<1> The OVF00 flag is also set to 1 in the following case.
<2> Even if the OVF00 flag is cleared before the next count clock is counted (before TM00 becomes 0001H)
If a conflict occurs between the read period of the 16-bit timer capture/compare register (CR000/CR010) and
capture trigger input (CR000/CR010 used as capture register), capture trigger input has priority. The data read
from CR000/CR010 is undefined.
When any of the following modes is selected: the mode in which clear & start occurs on a match between
TM00 and CR000, the mode in which clear & start occurs at the TI000 valid edge, or the free-running mode
TM00 is counted up from FFFFH to 0000H.
after the occurrence of TM00 overflow, the OVF00 flag is re-set newly and clear is disabled.
CR010 capture value
Capture read signal
TM00 count value
CR000 is set to FFFFH
Count clock
Edge input
INTTM010
Count clock
INTTM000
Figure 6-37. Capture Register Data Retention Timing
CR000
OVF00
TM00
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Figure 6-36. Operation Timing of OVF00 Flag
X
N
FFFEH
FFFFH
User’s Manual U16227EJ3V0UD
N + 1
FFFFH
Capture
N + 2
0000H
0001H
N + 2
M
Capture, but
read value is
not guaranteed
M + 1
M + 1
M + 2
161

Related parts for upd78f0114m6gb-8es