upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 530

• Manufacturer Part Number: upd78f0114m6gb-8es
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

E.1 Major Revisions in This Edition
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Addition of description on expanded-specification products of standard products and (A) grade products
Addition of Differences Between 78K0/KC1 and 78K0/KC1+ to INTRODUCTION
Addition of 1.1 Expanded-Specification Products and Conventional Products (Standard Products, (A)
Grade Products Only)
Modification of 1.6 Kx1 Series Lineup
Modification of connection of XT1 pin when unused in Table 2-2 Pin I/O Circuit Types
Modification of Note 3 and addition of Note 5 to Figure 5-2 Format of Processor Clock Control Register
(PCC)
Addition of minimum instruction execution time of X1 input clock at 12 MHz operation and addition of Notes 2
and 3 to Table 5-2 Relationship Between CPU Clock and Minimum Instruction Execution Time
Addition of status during oscillation stabilization time when f
Stabilization Time Counter Status Register (OSTC)
Addition of oscillation stabilization time when f
Format of Oscillation Stabilization Time Select Register (OSTS)
Modification of connection of XT1 pin when unused and addition of Note to 5.4.3 When subsystem clock is
not used
Addition of Note and modification of Table 5-5 Maximum Time Required to Switch Between Ring-OSC
Clock and X1 Input Clock
Addition of Caution 2 and modification of Table 5-6 Maximum Time Required for CPU Clock Switchover
Addition of description on using capture register to Interrupt request generation column in Figure 6-5 Format
of 16-Bit Timer Mode Control Register 00 (TMC00)
Addition of Caution 7 to Figure 6-7 Format of 16-Bit Timer Output Control Register 00 (TOC00)
Addition of Note 1 to Figure 6-8 Format of Prescaler Mode Register 00 (PRM00)
Modification of TMC00 set value in Figure 6-32 Timing of One-Shot Pulse Output Operation with
Software Trigger
Addition of Note to Figure 7-5 Format of Timer Clock Selection Register 50 (TCL50)
Addition of Note to Figure 7-6 Format of Timer Clock Selection Register 51 (TCL51)
Modification of Caution 2 in Figure 7-7 Format of 8-Bit Timer Mode Control Register 50 (TMC50) and
Figure 7-8 Format of 8-Bit Timer Mode Control Register 51 (TMC51)
Addition of Note 1 and modification of Note 2 in Figure 8-5 Format of 8-Bit Timer H Mode Register 0
(TMHMD0)
Addition of Note in Figure 8-6 Format of 8-Bit Timer H Mode Register 1 (TMHMD1)
Modification of Caution 3 and addition of Caution 5 to Figure 10-2 Format of Watchdog Timer Mode
Register (WDTM)
Modification of Cautions 1 and 2 in Figure 10-3 Format of Watchdog Timer Enable Register (WDTE)
Addition of Table 10-4 Relationship Between Watchdog Timer Operation and Internal Reset Signal
Generated by Watchdog Timer
APPENDIX E REVISION HISTORY
User’s Manual U16227EJ3V0UD
XP
= 12 MHz and addition of Cautions 1 and 2 to Figure 5-7
Description
XP
= 12 MHz to Figure 5-6 Format of Oscillation
(1/2)