st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 33

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

The interrupt controller receives external interrupt requests and makes an interrupt request to the
CPU when it has a pending interrupt request of higher priority than the currently executing interrupt
handler.
The Pending register is mapped onto two additional addresses so that bits can be set or cleared
individually.
Set_Pending (address ‘interrupt base address + #84’) allows bits to be set individually. Writing a
‘1’ in this register sets the corresponding bit in the Pending register, a ‘0’ leaves the bit unchanged.
Clear_Pending (address ‘interrupt base address + #88’) allows bits to be cleared individually.
Writing a ‘1’ in this register resets the corresponding bit in the Pending register, a ‘0’ leaves the bit
unchanged.
Note, if the CPU wants to write or clear some bits of the Pending register, the interrupts should be
masked (by writing or clearing the Mask register) before writing or clearing the Pending register.
The interrupts can then be unmasked.
Exec register
The Exec register keeps track of the currently executing and pre-empted interrupts. A bit is set
when the CPU starts running code for that interrupt. The highest priority interrupt bit is reset once
the interrupt handler executes a return from interrupt ( iret ).
The Exec register is mapped onto two additional addresses so that bits can be set or cleared
individually.
Set_Exec (address ‘interrupt base address + #104’) allows bits to be set individually. Writing a ‘1’
in this register sets the corresponding bit in the Exec register, a ‘0’ leaves the bit unchanged.
Clear_Exec (address ‘interrupt base address + #108’) allows bits to be cleared individually. Writing
a ‘1’ in this register resets the corresponding bit in the Exec register, a ‘0’ leaves the bit unchanged.
Pending
Bit
0
1
2
3
4
Exec
Bit
0
1
2
3
4
Bit field
PendingInt0
PendingInt1
PendingInt2
PendingInt3
PendingInt4
Bit field
Interrupt0Exec
Interrupt1Exec
Interrupt2Exec
Interrupt3Exec
Interrupt4Exec
Interrupt controller base address + #80
Interrupt controller base address + #100
Function
Interrupt 0 pending bit.
Interrupt 1 pending bit.
Interrupt 2 pending bit.
Interrupt 3 pending bit.
Interrupt 4 pending bit.
Function
Set to 1 when the CPU starts running code for interrupt 0.
Set to 1 when the CPU starts running code for interrupt 1.
Set to 1 when the CPU starts running code for interrupt 2.
Set to 1 when the CPU starts running code for interrupt 3.
Set to 1 when the CPU starts running code for interrupt 4.
Table 5.4 Pending register format
Table 5.5 Exec register format
Read/Write
Read/Write
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