st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 68

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

ST20-GP1
upsetting the error status of any complex operation being carried out by the pre-empted low priority
process.
In the event of a processor halting because of HaltOnError, the link will finish outstanding transfers
before shutting down. If CPUAnalyse is asserted then all inputs continue but outputs will not make
another access to memory for data. Memory refresh will continue to take place.
11.2 Bootstrap
The ST20-GP1 can be bootstrapped from external ROM, internal ROM or from a link. This is
determined by the setting of the BootSource0-1 pins, see Table 9.1 on page 52. If both
BootSource0-1 pins are held low it will boot from a link. If either or both pins are held high, it will
boot from ROM. This is sampled once only by the ST20-GP1, before the first instruction is
executed after reset.
11.2.1 Booting from ROM
When booting from ROM, the ST20-GP1 starts to execute code from the top two bytes in external
memory, at address #7FFFFFFE which should contain a backward jump to a program in ROM.
11.2.2 Booting from link
When booting from a link, the ST20-GP1 will wait for the first bootstrap message to arrive on the
link. The first byte received down the link is the control byte. If the control byte is greater than 1 (i.e.
2 to 255), it is taken as the length in bytes of the boot code to be loaded down the link. The bytes
following the control byte are then placed in internal memory starting at location MemStart.
Following reception of the last byte the ST20-GP1 will start executing code at MemStart. The
memory space immediately above the loaded code is used as work space. A byte arriving on the
bootstrapping link after the last bootstrap byte, is retained and no acknowledge is sent until a
process inputs from the link.
11.2.3 Peek and poke
Any location in internal or external memory can be interrogated and altered when the ST20-GP1 is
waiting for a bootstrap from link.
When booting from link, if the first byte (the control byte) received down the link is greater than 1, it
is taken as the length in bytes of the boot code to be loaded down the link.
If the control byte is 0 then eight more bytes are expected on the link. The first four byte word is
taken as an internal or external memory address at which to poke (write) the second four byte
word.
If the control byte is 1 the next four bytes are used as the address from which to peek (read) a word
of data; the word is sent down the output channel of the link.
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