st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 51

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

ST20-GP1
9.1
EMI signal descriptions
The following section describes the functions of the EMI pins. Note that a signal name prefixed by
not indicates active low.
MemAddr1-19
External address bus. The ST20-GP1 uses 30 bits of addressing internally but only the bottom 18
bits are brought out to external pins (MemAddr2-19); MemAddr1 is generated by the EMI.
MemAddr1-19 is valid and constant for the whole duration of an external access. The memory
locations in each bank can be accessed at multiple addresses, as bits 20-29 are ignored when
making external accesses.
MemData0-15
External data bus. The data bus may be configured to be either 8 or 16 bits wide on a per bank
basis. MemData0 is always the least significant bit. MemData7 is the most significant bit in 8-bit
mode and MemData15 is the most significant bit in 16-bit mode. When performing a write access
to a bank configured to be 8-bits wide, MemData8-15 are held in a high-impedance state for the
duration of the access; MemData0-7 behave according to the configuration parameters as
specified in Section 9.5. When making a write to a bank configured to be 16-bits wide,
MemData0-15 behave according to the configuration parameters.
notMemCE0-3
Chip enable strobes, one per bank. The notMemCE0-3 strobe corresponding to the bank being
accessed will be active on both reads and writes to that bank.
notMemOE3-0
Output enable strobes, one per bank. The notMemOE0-3 strobe corresponding to the bank being
accessed will be active only on reads to that bank.
notMemWB0-1
Byte selector strobes to select bytes within a 16-bit half-word. These strobes are shared between
all four banks. notMemWB0 always corresponds to write data on MemData0-7 whether the bus is
currently 8 or 16 bits wide. When the EMI is writing to a bank configured to be 16 bits wide,
notMemWB1 corresponds to MemData8-15. When the EMI is accessing a bank configured to be
8 bits wide, notMemWB1 becomes address bit 0 and follows the timing of MemAddr1-19 for that
bank.
MemWait
Halt external access. The EMI samples MemWait at or just after the midpoint of an access. If
MemWait is sampled high, the access is stalled. MemWait will then continue to be sampled and
the access proceeds when MemWait is sampled low. The action of MemWait may be disabled by
software, see Section 9.4. No mechanism is provided to abort an access; if MemWait is held high
too long the EMI will become a contentious resource and may stall the ST20-GP1.
BootSource0-1
These signals are sampled immediately after reset and determine both the bootstrap behavior and
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