st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 91

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

15.4.2 Valid/Ack protocol
In this mode the 2 control pins PlinknotReq (Qack/Ivalid) and PlinknotAck (Qvalid/Iack) are active
high. The initial (inactive) state of the 2 control wires is low.
Valid Ack output
An output transaction proceeds as follows.
Valid Ack input
An input transaction proceeds as follows.
1
2
3
4
1
2
3
4
PlinknotAck
(Qvalid)
PlinknotReq
(Qack)
PlinkData0-7
PlinknotReq
(Ivalid)
PlinknotAck
(Iack)
PlinkData0-7
The DMA is programmed to perform an out and the DMA engine receives its first byte in the
buffer from the EMI.
The PLink drives the data to the PlinkData0-7 pins and drives PlinknotAck (Qvalid) high.
The external device acknowledges receipt of the data by taking PlinknotReq (Qack) high.
The PLink can then take PlinknotAck (Qvalid) low.
The external device can take PlinknotReq (Qack) low ready for the next transaction.
The external device drives the data pins and PlinknotReq (Ivalid) is asserted high.
If the DMA engine has empty buffer space PlinkData0-7 is latched and PlinknotAck (Iack)
is driven high by the PLink. The DMA writes to the appropriate address in memory.
The external device can then drive PlinknotReq (Ivalid) low.
PlinknotAck (Iack) can be taken low. The external device can then initiate the next transac-
tion.
old data
Figure 15.2 Valid/Ack protocol
ST20 Output
ST20 Input
valid data
ST20-GP1
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