cynse70032 Cypress Semiconductor Corporation., cynse70032 Datasheet - Page 19

• Manufacturer Part Number: cynse70032
• Description: Network Search Engine
• Manufacturer: Cypress Semiconductor Corporation.

12.2
Table 12-2 lists the CMD bus fields that contain the CYNSE70032 command parameters and their respective cycles. Each
command is described separately in the subsections that follow.
Table 12-2. Command Parameters
12.3
The Read can be a single Read of a data array, a mask array, an SRAM, or a register location (CMD[2] = 0). It can be a burst
Read of the data (CMD[2] = 1) or mask array locations using an internal autoincrementing address register (RBURADR).
A description of each type is provided in Table 12-3. A single-location Read operation lasts six cycles, as shown in Figure 12-1.
The burst Read adds two cycles for each successive Read. The SADR[21:19] bits supplied in Read instruction cycle A drive
SADR[21:19] signals during the Read of an SRAM location.
Table 12-3. Read Command Parameters
Note:
Document #: 38-02042 Rev. *E
5.
Command Parameter
Command
Learn
Search
The 272-bit-configured devices or 272-bit-configured quadrants within devices do not support the Learn instruction.
Read
Write
CMD[2]
[5]
Commands and Command Parameters
Read Command
0
1
CYC
A
B
A
B
A
B
A
B
SADR[21]
SADR[21]
SADR[21]
SADR[21]
Read Command
Single Read
8
0
0
0
Burst Read
SSR Index[2:0]
SADR[20]
SADR[20]
SADR[20]
SADR[20]
7
0
0
0
Reads a single location of the data array, mask array, external SRAM, or device
registers. All access information is applied on the DQ bus.
Reads a block of locations from the data or mask arrays as a burst. The RBURADR
specifies the starting address and the length of the data transfer from the data or
mask array, and it autoincrements the address for each access. All other access
information is applied on the DQ bus.
SRAM can only be read in single-Read mode.
SADR[19]
SADR[19]
SADR[19]
SADR[19]
1: 136-bit
0: 68-bit
Mode
6
0
0
GMR Index [2:0]
GMR Index [2:0]
GMR Index 2:0]
5
0
0
Comparand Register Index
Comparand Register Index
Comparand Register Index
4
0
0
Description
Note
3
0
0
. The device registers and external
68-bit or 136-bit: 0
0 in second cycle
1 in first cycle
0 = Single
0 = Single
0 = Single
0 = Single
1 = Burst
1 = Burst
1 = Burst
1 = Burst
272-bit:
2
CYNSE70032
Page 19 of 126
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1