pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 103

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

Revision 1.07
Embedded Controller Modules
Interrupt Status Register 1 (ISTAT1)
This register indicates which maskable interrupts are pending regardless of the state of the corresponding IENA bits.
Location: 00 FE0C
Type: RO
Interrupt Enable and Mask Register 0 (IENAM0)
This register controls the enable/disable of the maskable interrupt sources INT0 to INT15. The register is cleared (0000
on reset.
Location: 00 FE0E
Type: R/W
Interrupt Enable and Mask Register 1 (IENAM1)
This register controls the enable/disable of the maskable interrupt sources INT16 to INT31. The register is cleared (0000
on reset.
Location: 00 FE10
Type: R/W
Bit
Name
Reset
Bit
Name
Reset
Bit
Name
Reset
15-0 IST31-16 (Interrupt Status). Each bit indicates if an interrupt event was sent to the ICU; IST31 to IST16
15-0 IENA15-0 (Interrupt Enable). Each bit enables or disables the corresponding interrupt request INT0 to INT15;
15-0 IENA31-16 (Interrupt Enable). Each bit enables or disables the corresponding interrupt request INT16 to
Bit
Bit
Bit
correspond to INT31 to INT16, respectively. Each bit is encoded as follows:
0: Interrupt input to ICU not pending
1: Interrupt input to ICU pending
e.g. IENA15 controls INT15. Since INT0 is not used, IENA0 has no effect on the operation of the ICU.
0: Interrupt disabled
1: Interrupt enabled
INT31; e.g. IENA16 controls INT16.
0: Interrupt disabled
1: Interrupt enabled
15
15
15
0
0
0
16
16
16
14
14
14
0
0
0
13
13
13
0
0
0
12
12
12
0
0
0
11
11
11
0
0
0
(Continued)
10
10
10
0
0
0
9
0
9
0
9
0
Description
Description
Description
103
IENA31-16
IENA15-0
IST31-16
8
0
8
0
8
0
7
0
7
0
7
0
6
0
6
0
6
0
5
0
5
0
5
0
4
0
4
0
4
0
3
0
3
0
3
0
2
0
2
0
2
0
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1
0
1
0
1
0
0
0
0
0
0
0
16
16
)
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