pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 152
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Embedded Controller Modules
Each functional unit is described briefly in this section.
Transmitter
The Transmitter consists of an 8-bit transmit shift register and an 8-bit transmit buffer. Data is loaded in parallel from the
buffer into the shift register and then transmitted serially on the UTXD pin.
Receiver
The Receiver consists of an 8-bit receive shift register and an 8-bit receive buffer. Data is received serially into the shift reg-
ister from the URXD pin. After eight bits have been received, the contents of the shift register are transferred in parallel to
the receive buffer.
Baud Rate Generator
The Baud Rate Generator generates the clock for the Asynchronous and Synchronous modes of operation. It consists of
two registers and a two-stage counter. The registers are used to specify a pre-scaler value and baud rate divisor. The first
stage of the counter divides the CLK clock in 0.5 increments based on the value of the pre-scaler. The second stage of the
counter divides the output of the first stage in integer increments based on the value of the baud rate divisor.
Control and Error Detection
This unit contains the control registers (see Section 4.9.4 on page 158), control logic, error detection circuitry and parity gen-
erator/checker. It supports:
Selection of the data format, mode of operation, clock source and parity type
Generation and detection of parity
Reporting of parity errors
Detection and reporting of data overrun and frame errors
Interrupts on transmit buffer empty, receive buffer full, receive error and delta clear to send conditions
Generation and detection of line breaks
Generator/Checker
Error Detection
Control and
Parity
Figure 52. USART Block Diagram
(Continued)
Transmitter
Receiver
152
Generator
Baud Rate
sys_clk
URXD
USCLK
UTXD
Revision 1.07
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