pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 122
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Embedded Controller Modules
4.6
The PS/2 protocol is an industry-standard, PC-AT-compatible interface for keyboards. It uses a two-wire bidirectional TTL
interface for data transmission. Several vendors also supply PS/2 mouse products and other pointing devices that employ
the same type of interface.
The PC87591x provides four PS/2 data transfer channels. Each channel has two quasi-bidirectional signals that serve as
direct interfaces to an external keyboard, mouse or any other PS/2-compatible pointing device. Since the four channels are
identical, the connector ports are interchangeable.
4.6.1
4.6.2
In the previous generation of keyboard controllers, firmware executed the PS/2 device interface by toggling the interface
signals. The PC87591x (and its predecessor, the PC87570) supports this bit toggling mode via either polling or interrupt-
driven clock edge detection.
PS/2 devices’ firmware is significantly simplified through the use of a hardware accelerator mechanism. The accelerator in-
cludes an 8-bit shift register, a state-machine and control logic that handle both the incoming and outgoing data. It reduces
code overhead, performance requirements and reduces the overall interrupt latency from the core firmware. The hardware
is designed to meet the PS/2 device interface as defined in Keyboard and Auxiliary Device Controller (Types 1 and 2),
August 1988.
Section Naming conventions
Interface Signals
The PS/2 interface includes eight external signals (PSCLK4-1 and PSDAT4-1) and six registers.
Module Block Diagram
A schematic description of the PS/2 interface appears in Figure 38. The interface to the three channels is symmetric and
only channel 1 is detailed in the figure.
Four PS/2 channels
Enable/Disable for each of the four channels
Automatic hardware shift mechanism
Hardware support for PS/2 auxiliary device protocol
Processor interrupts at the beginning and end of data transfer
Optional software-based PS/2 implementation
In this section, the term “channel” describes the interface to one of the PS/2 devices and its two associated signals
(clock and data).
The term “shift mechanism” refers to the hardware accelerator.
The term “PS/2 interface” refers to the entire mechanism.
PS/2 INTERFACE
Features
General Description
(Continued)
122
Revision 1.07
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