pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 15

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

Revision 1.07
Table of Contents
4.20
4.19.3
4.19.4
4.19.5
4.19.6
4.19.7
4.19.8
4.19.9
4.19.10 Usage Hints .............................................................................................................. 271
DEVELOPMENT SYSTEM SUPPORT ................................................................................... 272
4.20.1
4.20.2
4.20.3
4.20.4
4.20.5
4.20.6
4.20.7
Debugger Interface Functional Description ............................................................... 249
Flash Interface Functional Description ...................................................................... 251
Test Access Port (TAP) ............................................................................................. 253
TAP Instruction Register ............................................................................................ 256
TAP Data Registers, Debugger Interface .................................................................. 260
TAP Data Registers, Flash Interface ......................................................................... 262
Core Registers, Debugger Interface .......................................................................... 267
Features .................................................................................................................... 272
The ISE Interrupt ....................................................................................................... 272
Break Line and Reset Output Interrupt ...................................................................... 272
TRIS Strap Input Pin .................................................................................................. 272
Freezing Events ......................................................................................................... 273
Monitoring Activity During Development .................................................................... 273
On-Chip Hardware Breakpoint .................................................................................. 274
(Continued)
Rx Data Link ...................................................................................................... 249
TX Data Link ...................................................................................................... 250
Debugger Reset Circuit ..................................................................................... 250
ISE Interrupt Control .......................................................................................... 250
Clock Synchronization ....................................................................................... 251
TAP Signals ....................................................................................................... 254
TAP Controller ................................................................................................... 254
Design and Construction ................................................................................... 256
Instruction Register Operation ........................................................................... 257
Instructions ........................................................................................................ 258
Flash Support Instructions ................................................................................. 258
Debugger Interface Instructions ......................................................................... 259
Bit Arrangement and Mapping ........................................................................... 260
Functionality in Various TAP Controller States .................................................. 260
Debug Bypass Register (BYPASS) ................................................................... 261
Debug Data Register (DBGDATA) .................................................................... 261
Debug Abort Mask Register (DBGMASKS) ....................................................... 261
Flash Control and Status Register (FL_CT_ST) ................................................ 262
Flash Identification Register (FL_ID) ................................................................. 263
Flash Address Register (FL_ADDR) .................................................................. 264
Flash Data Register (FL_DATA) ........................................................................ 265
Flash Erase Register (FL_ERASE) ................................................................... 266
Core Register Map ............................................................................................. 267
Debug Receive Data Registers 0, 2, 4, 6, 8, 10, 12 and 14 (DBGRXD0-14) .... 267
Debug Receive Status Register (DBGRXST) .................................................... 268
Debug Transmit Data Registers 0, 2, 4, 6, 8, 10, 12 and 14 (DBGTXD0-14) .... 268
Debug Transmit Lock Register (DBGTXLOC) ................................................... 269
Debug Transmit Status Register (DBGTXST) ................................................... 269
Debug TINT Assert Register (DBGTINT) .......................................................... 270
Debug Abort Generate Register (DBGABORT) ................................................. 270
Debug ISE Source Registers A (DBGISESRCA) .............................................. 271
Bus Status Signals ............................................................................................. 273
Transaction Effect on the External Bus ............................................................. 274
Pipe Status Signals (PFS and PLI) .................................................................... 274
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