pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 266
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Embedded Controller Modules
Flash Erase Register (FL_ERASE)
FL_ERASE is a shift register that starts a flash erase operation and returns the status of the erase operation. The type of
erase performed depends on the settings in the Control and Status register. The connection of the register to the serial chain
is shown in Figure 91. The FL_ERASE register is reset at Power-Up and TAP resets only.
Type: Varies per bit
Bit
0
1
Type
WO
RO
RO
Busy. On read (Capture-DR), indicates the status of the flash array.
0: Flash is idle and is ready for an erase command to be started
1: Flash is busy executing a previous erase or write command; any command given at this state is ig-
Start. On write (Update-DR), starts a flash erase process.
0: Do not start a new erase process
1: Start a new erase process
Error. Indicates that an error occurred during the last erase cycle. This bit has valid data only when the
Busy bit is cleared.
0: Last erase was completed successfully (default)
1: An error was detected during the last erase. This may be due either to a failed erase or protection be-
nored.
ing set. More details about the error type are available by reading the Control and Status register.
When a value of 1 is read, this bit is cleared.
Bit
Name
Reset
Figure 91. Flash Erase Register
TDI
(Continued)
1
FL_ERASE
1
Error
1
Control
Status
1
0
266
0
0
Description
0
Start/Busy
TDO
0
0
Revision 1.07
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