pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 276
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
- Current page: 276 of 401
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5.0 Host Controller Interface Module
5.4.1
The following set of registers is accessible only by the core. The registers are powered by V
For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 32.
Core Access to Host-Controlled Modules Register Map
Indirect Host I/O Address Register (IHIOA)
This register defines the host I/O address for read or write transactions from/to the Host-Controlled modules. The I/O ad-
dress is an offset from the least significant bits of the logical device address. The accessed device is selected using the Core
to SIB Modules Access Enable Register (CRSMAE); see page 278.
Location: 00 FCE0
Type:
Indirect Host Data Register (IHD)
This register holds host data for read or write transactions from/to the Host-Controlled modules.
Location: 00 FCE2
Type:
Bit
Name
Reset
Bit
Name
Reset
15-8 Reserved.
7-0
7-0
Bit
Bit
Core Access to Host-Controlled Module Registers
Indirect Host I/O Offset. Only offsets within the logical device range are allowed. Other offsets may have
unpredictable results.
Indirect Host Data.
R/W
R/W
15
0
16
16
7
0
IHIOA
IHD
LKSIOHA
SIOLV
CRSMAE
SIBCTRL
14
0
Mnemonic
13
0
6
0
Reserved
12
0
Indirect Host I/O Address
Indirect Host Data
Lock SuperI/O Host Access
SuperI/O Access Lock Violation
Core to SIB Modules Access Enable
SIB Control
11
0
5
0
10
0
Register Name
(Continued)
9
0
Indirect Host Data
Description
Description
276
4
0
8
0
7
0
3
0
6
0
Indirect Host I/O Offset
5
0
Varies per bit
2
0
R/W1C
Type
R/W
R/W
R/W
R/W
4
0
CC
.
3
0
1
0
2
0
1
0
0
0
Revision 1.2
0
0
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