pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 315
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
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Revision 1.2
6.0 Host-Controlled Modules and Host Interface
6.1.12 Real Time Clock (RTC) Configuration
Logical Device 16 (10
Table 52 lists the configuration registers that affect the RTC. See Section 6.1.1 on page 297 and Section 6.1.2 on page 302
for descriptions of the other configuration registers.
RAM Lock Register (RLR)
When a non-reserved bit is set to 1, it can be cleared only by host domain hardware reset.
Location: Index F0
Type:
Bit
Reset
2-0
Bit
3
4
5
Name
30
60
61
62
63
70
71
74
75
F0
F1
F2
F3
Index
16
16
16
16
16
16
16
16
16
16
16
16
16
Reserved.
Block Extended RAM. Controls access to the Extended RAM 128 bytes.
0: No effect on Extended RAM access (default)
1: Reads and writes to the Extended RAM are blocked, writes are ignored and reads return FF
Block Extended RAM Read. Controls read from bytes 00
0: No effect on Extended RAM access (default)
1: Reads to bytes 00
Block Extended RAM Write. Controls writes to bytes 00
0: No effect on the Extended RAM access (default)
1: Writes to bytes 00
R/W
Activate. When bit 0 is cleared, the registers of this logical device are not
accessible.
Base Address MSB register.
Base Address LSB register. Bit 0 (for A0) is read only, ‘0’.
Base Address MSB register.
Base Address LSB register. Bit 0 (for A0) is read only, ‘0’.
RTC Interrupt Number and Wake-Up on IRQ Enable register.
RTC Interrupt Type. Bit 1 is read/write; other bits are read only.
Report no DMA assignment.
Report no DMA assignment.
RAM Lock Register (RLR)
Date of Month Alarm Register Offset (DOMAO)
Month Alarm Register Offset (MONAO)
Century Register Offset (CENO)
Standard
Block
RAM
16
7
0
16
) RTC Configuration
Block RAM
16
16
Write
-1F
-1F
6
0
RTC Configuration Register or Action
16
16
of the Extended RAM are ignored
of the Extended RAM are ignored; reads return FF
Table 52. RTC Configuration Registers
RAM Write
Extended
Block
5
0
RAM Read
Extended
Block
Description
315
4
0
16
16
-1F
(Continued)
Extended
-1F
Block
RAM
16
16
3
0
of the Extended RAM.
of the Extended RAM.
2
0
16
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
RO
RO
1
0
16
Reset
00
00
70
00
72
08
00
04
04
00
00
00
00
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