xcr3320 Xilinx Corp., xcr3320 Datasheet - Page 42

• Manufacturer Part Number: xcr3320
• Description: Xcr3320 320 Macrocell Sram Cpld
• Manufacturer: Xilinx Corp.

Table 18: Pin Function Description (Continued)
DS033 (v1.3) October 9, 2000
Symbol
A[19:0]
crcerrn
D[7:0]
cs0n
dout
ldcn
hdc
cs1
wrn
gts
R
26, 28, 30, 34,
36, 93, 39, 48,
50, 52, 54, 65,
67, 69, 72, 74,
13, 155, 11, 1,
82, 85, 87, 91
Pin Number
9, 7, 3, 5
149
136
123
138
120
58
22
78
This product has been discontinued. Please see
Type
I/O
O
O
O
O
I
I
I
High During Configuration (hdc) is output high when the XCR3320 is in the
configuration state. hdc is used as a control output indicating that configuration is in
progress. After configuration, the pin is a user-programmable I/O, and no external
termination is required. See
Low During Configuration (ldcn) is output low when the XCR3320 is in the
configuration state. ldcnis used as a control output indicating that configuration is in
progress. After configuration, the pin is a user-programmable I/O, and no external
termination is required. See
crcerrn goes Low when the XCR3320 detects a CRC error or an invalid peramble
during configuration. The XCR3320 that detected the error will go into the initialization
state and will not resume configuration until prgmn and resetn are both High. Once
configuration has resumed crcerrn will go High. During configuration, an internal
pull-up is enabled. If only one device is used, this pin can be left floating. If multiple
devices are daisy chained, an external pull-up should be used. After configuration,
the pin is a user-programmable I/O, and no external termination is required. See
“Terminations” on page 8
Global 3-state is an active-high dedicated input used to 3-state the I/Os and activate
the internal pull-down resistors. If this feature is not used, the pin should be pulled
Low.
cs0n/cs1/wrn are used in the peripheral configuration mode. The XCR3320 is
selected when cs0n and wrn are Low and cs1 is High. After configuration, these pins
are user-programmable I/O. cs0N and wrn require no external termination. See
“Terminations” on page
configuration in synchronous peripheral mode, the 3-state property should be used
to disable the internal pull-down resistor. See
page 19
In the master parallel configuration mode, A[19:0] address the configuration
EEPROM. After configuration, the pin is a user-programmable I/O, and no external
termination is required. See
During master parallel, peripheral, and slave parallel configuration modes, D[7:0]
receive configuration data. After configuration, the pin is a user-programmable I/O,
and no external termination is required. See
information.
During configuration, dout is the serial data out that is used to drive the din of
daisy-chained slave devices. Data on dout changes on the falling edge of cclk.
After configuration, the pin is a user-programmable I/O, and no external termination
is required. See
for more information.
www.xilinx.com
1-800-255-7778
“Terminations” on page 8
8for more information. If cs1 is not used as an I/O after
for more information.
“Terminations” on page 8
“Terminations” on page 8
“Terminations” on page 8
www.xilinx.com/partinfo/notify/pdn0007.htm
XCR3320: 320 Macrocell SRAM CPLD
Description
for more information.
“Terminations” on page 8
“Synchronous Peripheral Mode” on
for more information.
for more information.
for more information.
for more
for details.
42