adsp-21483 Analog Devices, Inc., adsp-21483 Datasheet - Page 24
adsp-21483
Manufacturer Part Number
adsp-21483
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-21483.pdf
(66 pages)
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ADSP-21483/21486/21487/21488/21489
Reset
Table 16. Reset
1
Running Reset
The following timing specification applies to
RESETOUT/RUNRSTIN pin when it is configured as
RUNRSTIN.
Table 17. Running Reset
Parameter
Timing Requirements
t
t
Parameter
Timing Requirements
t
t
Applies after the power-up sequence is complete. At power-up, the processor’s internal phase-locked loop requires no more than 100 μs while RESET is low, assuming stable
WRST
SRST
WRUNRST
SRUNRST
V
DD
1
and CLKIN (not including start-up time of external clock oscillator).
RUNRSTIN
CLKIN
RESET Pulse Width Low
RESET Setup Before CLKIN Low
Running RESET Pulse Width Low
Running RESET Setup Before CLKIN High
CLKIN
t
WRUNRST
Rev. PrA | Page 24 of 66 | March 2010
Figure 9. Running Reset
Figure 8. Reset
t
WRST
Min
4t
8
Min
4 × t
8
CK
CK
t
SRUNRST
Preliminary Technical Data
Max
Max
t
SRST
Unit
ns
ns
Unit
ns
ns
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