mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 196

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timer Interface Module (TIM)
Technical Data
196
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
MSxB
When ELSxB:ELSxA = 0:0, this read/write bit selects the initial output
level of the TCHx pin. (See
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E, and pin PTEx/TCHx is available as a general-purpose I/O
pin.
ELSxB and ELSxA bits.
X
X
0
0
0
0
0
0
1
1
1
1 = Initial output level low
0 = Initial output level high
Table 11-3
MSxA
X
X
X
0
1
0
0
0
1
1
1
Timer Interface Module (TIM)
Table 11-3. Mode, Edge, and Level Selection
ELSxB ELSxA
shows how ELSxB and ELSxA work. Reset clears the
0
0
0
1
1
0
1
1
0
1
1
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
0
0
1
0
1
1
0
1
1
0
1
Table
Compare or
Compare
Capture
or PWM
Buffered
Buffered
Output
Preset
Output
Output
Mode
PWM
Input
11-3.) Reset clears the MSxA bit.
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Freescale Semiconductor
Configuration

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