mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 205

• Manufacturer Part Number: mc68hc908jb8
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

12.4.2 Data Direction Register B
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
NOTE:
NOTE:
Address:
PTB[7:0] — Port B Data Bits
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic 1 to a DDRB bit enables the output buffer for
the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
For those devices packaged in a 20-pin PDIP, 20-pin SOIC, and 28-pin
SOIC package, PTB7–PTB0 are not connected. DDRB7–DDRB0
should be set to a 1 to configure PTB7–PTB0 as outputs.
Figure 12-7
Reset:
Read:
Write:
These read/write bits are software-programmable. Data direction of
each port B pin is under the control of the corresponding bit in data
direction register B. Reset has no effect on port B data.
The port B pullup enable bit, PBP, in the port option control register
(POCR) enables pullups on port B pins if the respective pin is
configured as an input. (See
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
$0005
Bit 7
0
Figure 12-6. Data Direction Register B (DDRB)
shows the port B I/O logic.
Input/Output Ports (I/O)
DDRB6
6
0
DDRB5
0
5
12.8 Port
DDRB4
0
4
DDRB3
Options.)
3
0
DDRB2
2
0
Input/Output Ports (I/O)
DDRB1
1
0
Technical Data
DDRB0
Bit 0
Port B
0
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