mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 211

• Manufacturer Part Number: mc68hc908jb8
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

12.6.2 Data Direction Register D
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
NOTE:
NOTE:
Address:
Data direction register D determines whether each port D pin is an input
or an output. Writing a logic 1 to a DDRD bit enables the output buffer for
the corresponding port D pin; a logic 0 disables the output buffer.
DDRD[7:0] — Data Direction Register D Bits
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
For those devices packaged in a 20-pin PDIP and 20-pin SOIC package,
PTD7–PTD2 are not connected. DDRD7–DDRD2 should be set to a 1 to
configure PTD7–PTD2 as outputs.
For those devices packaged in a 28-pin SOIC package, PTD7 is not
connected. DDRD7 should be set to a 1 to configure PTD7 as output.
Figure 12-13
Reset:
Read:
Write:
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
Port D pins are open-drain when configured as output.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
DDRD7
$0007
Bit 7
Figure 12-12. Data Direction Register D (DDRD)
0
shows the port D I/O circuit logic.
Input/Output Ports (I/O)
DDRD6
6
0
DDRD5
0
5
DDRD4
0
4
DDRD3
3
0
DDRD2
2
0
Input/Output Ports (I/O)
DDRD1
1
0
Technical Data
DDRD0
Bit 0
Port D
0
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