mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 251

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
;
HIBYTE
LOBYTE
DOLO
RETURN
Address:
SBSW — SIM Break Stop/Wait
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example of this.
This code works if the H register was stacked in the break interrupt
routine. Execute this code at the end of the break interrupt routine.
Reset:
Read:
Write:
This read/write bit is set when a break interrupt causes an exit from
wait or stop mode. Clear SBSW by writing a logic 0 to it. Reset clears
SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
$FE00
Bit 7
R
R
Figure 17-6. Break Status Register (BSR)
Break Module (BREAK)
5
6
SBSW,BSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
= Reserved
R
6
R
5
R
4
;
;
; If RETURNLO is not zero,
; then just decrement low byte.
; Else deal with high byte, too.
; Point to WAIT/STOP opcode.
; Restore H register.
See if wait mode or stop mode
was exited by break.
1. Writing a logic zero clears SBSW.
R
3
R
2
Break Module Registers
Break Module (BREAK)
Note
SBSW
1
0
Technical Data
(1)
Bit 0
R
251

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