mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 62

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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FLASH Memory
4.9.1 Variables
4.9.2 ERASE Routine
Technical Data
62
The ROM-resident routines use three variables: CTRLBYT, CPUSPD
and LADDR; and one data buffer. The minimum size of the data buffer
is one byte and the maximum size is 64 bytes.
CPUSPD must be set before calling the ERASE or PROGRAM routine,
and should be set to four times the value of the CPU internal bus speed
in MHz. For example: for CPU speed of 3MHz, CPUSPD should be set
to 12.
The ERASE routine erases the entire FLASH memory. The routine does
not check for a blank range before or after erase.
CTRLBYT
Routine
Calling Address
Stack Use
Input
DATABUF
CPUSPD
Variable
LADDR
Table 4-2. ROM-Resident Routine Variables
FLASH Memory
$004C–$008B
$004A–$004B
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Address
ERASE
$FC06
5 Bytes
CPUSPD — CPU speed
HX —
CTRLBYT — Mass erase
$0048
$0049
Table 4-3. ERASE Routine
Mass erase if bit 6 = 1
Contains any address in the range to be
erased
Control byte for setting mass erase.
Timing adjustment for different CPU
speeds.
Last FLASH address to be programmed.
Data buffer for programming and verifying.
Description
Freescale Semiconductor

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