mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 204
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mc68hc908jb8
Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908JB8.pdf
(286 pages)
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Input/Output Ports (I/O)
12.4 Port B
12.4.1 Port B Data Register
Technical Data
204
NOTE:
Additional
Function:
Address:
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
Port B is an 8-bit general-purpose bidirectional I/O port with software
configurable pullups.
The port B data register contains a data latch for each of the eight port B
pins.
PTB7–PTB0 are not available in the 20-pin PDIP, 20-pin SOIC, and
28-pin SOIC packages.
NOTES:
Reset:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Read:
Write:
DDRA
Bit
0
1
Optional
$0001
pullup
PTB7
Bit 7
PTA Bit
Figure 12-5. Port B Data Register (PTB)
Input/Output Ports (I/O)
X
Optional
X
(1)
pullup
PTB6
6
Table 12-2. Port A Pin Functions
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
I/O Pin Mode
Input, Hi-Z
Optional
pullup
PTB5
Output
5
Optional
Unaffected by reset
(2)
pullup
PTB4
4
Read/Write
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
Optional
pullup
PTB3
3
Table 12-2
Optional
pullup
PTB2
PTA[7:0]
Freescale Semiconductor
2
Read
Accesses to PTA
Pin
Optional
pullup
PTB1
summarizes
1
PTA[7:0]
PTA[7:0]
Write
Optional
pullup
PTB0
Bit 0
(3)
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