dp83261 National Semiconductor Corporation, dp83261 Datasheet - Page 11
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dp83261
Manufacturer Part Number
dp83261
Description
Bmac Device Fddi Media Access Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83261.pdf
(132 pages)
- Current page: 11 of 132
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4 0 FDDI MAC Facilities
Frames Generated Externally
The Ring Engine transmits frames passed to it from the Sys-
tem Interface The data portion of the frame is created by
the System Interface This begins with the FC field and ends
with the last byte of the INFO field The FC field is passed
transparently to the ring The length bit in the FC field is
used to determine the length of the transmitted addresses
The data is passed as a byte stream across the MAC Re-
quest Interface as shown in Table 4-5
Before the frame is transmitted the Ring Engine inserts the
Start of Frame Sequence with at least 8 bytes of Preamble
but no more than 40 bytes of Preamble The starting delimi-
ter is transmitted as a JK symbol pair The Source Address
is normally transmitted by the Ring Engine since it uses the
Source Address to strip the frame from the ring This can be
overridden by using the Source Address transparency capa-
bility Similarly the Frame Check Sequence (4 bytes) is nor-
mally transmitted by the Ring Engine This can be overrid-
den with the FCS transparency capability With FCS trans-
parency the FCS is transmitted from the data stream The
End of Frame Sequence is always transmitted by the Ring
Engine as TR RR
Frames transmitted by the Ring Engine must have a valid
DA and SA field If the end of a frame is reached before a
valid length is transmitted the frame will be aborted and a
Void frame will be transmitted
My Claim
My Claim
My Void
My Void
INFO
Field
FCS
PA
SD
FC
DA
SA
ED
FS
Type
Type
Void
Void
4 if Present
t
2 or 6
2 or 6
8
Size
t
TABLE 4-5 Frame Formats
1
1
1
1
s
0
Not ELA
40
Enable
Not ESA
Not ESA
Enable
ELA
ESA
ESA
MA Request
INFO
FCS
DA
FC
SA
Short
Long
Size
Short
Short
Long
Long
Size
(Continued)
PH Request
PA
PA
MSA MLA
Idle Pairs
or SA
INFO
FCS
PA
PA
PA
PA
SFS
DA
TR
RR
JK
FC
TABLE 4-7 Claim Frames
TABLE 4-6 Void Frames
SFS
SD
SD
SD
SD
SD
SD
11
FC
C3
83
Frames Generated by the Ring Engine
The Ring Engine generates and detects several frames in
order to attain and maintain an operational ring
Void Frames
Void frames are used during normal operation The Ring
Engine generates two types of void frames regular Void
frames and My Void frames See Table 4-6
If short addressing is enabled Void frames with the short
address are transmitted otherwise Void frames with the
long address are transmitted
Void frames are transmitted in order to reset the Valid
Transmission timers (TVX) in other stations in order to elimi-
nate an unnecessary entry to the Claim state Stations are
not required to copy Void frames Void frames are transmit-
ted by the Ring Engine in two situations
1 While holding a token when no data is ready to be trans-
2 After a frame transmission is aborted
My Void frames are transmitted by the Ring Engine in
three situations
1 After a request to measure the Ring Latency has been
2 After this station wins the Claim Process before the token
3 After a frame has been transmitted with the STRIP option
Void frames are also detected by the Ring Engine A Void
frame with a Source Address other than MSA or MLA is
considered an Other Void frame
Claim Frames
Claim frames are generated continuously with minimum pre-
amble while the Ring Engine is in the Transmit Claim state
The format of Claim frames generated by the Ring Engine is
shown in Table 4-7 When long addressing is enabled
frames with the long address are transmitted otherwise
frames with the short address are transmitted
The Ring Engine detects reception of valid Claim frames A
comparison is performed between the (first) four bytes of
the received INFO field and TREQ in order to distinguish
Higher Claim Lower Claim and My Claim Details are
given in Appendix A
mitted
made when the next early token is captured
is issued
before the token for that service opportunity is issued
FC
00
40
00
40
MSA
MLA
DA
MSA
MLA
Null
Null
DA
MSA
MLA
SA
MSA
MLA
MSA
MLA
SA
TREQ
TREQ
INFO
FCS
FCS
FCS
FCS
FCS
FCS
FCS
FCS
TRRR
TRRR
TRRR
TRRR
TRRR
TRRR
EFS
EFS
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