dp83261 National Semiconductor Corporation, dp83261 Datasheet - Page 117
dp83261
Manufacturer Part Number
dp83261
Description
Bmac Device Fddi Media Access Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83261.pdf
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8 0 Electrical Characteristics
8 4 2 Clock Signals
8 4 3 PHY Interface
Note All setup and hold testing is done on single edges only (i e no combined setup hold testing is done for pulse signals This implies that the signal makes only
one low to high or high to low transition per cycle)
Symbol
T21
T22
T23
T24
T25
Symbol
T26
T27
T28
T29
LSC to LBC Lead Time (Skew Left)
LSC Pulse Width High
LSC Pulse Width Low
LBC Pulse Width High
LBC Pulse Width Low
PHY Data Input Setup
PHY Data Input Hold
PHY Data Sustain
PHY Data Valid
Parameter
Parameter
FIGURE 8-6 PHY Interface Timing
(Continued)
FIGURE 8-5 Clock Signals
117
Min
15
10
5
Min
b
12
21
35
35
4
TL F 10387 – 32
Max
45
Max
45
45
6
TL F 10387 – 33
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
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