dp83261 National Semiconductor Corporation, dp83261 Datasheet - Page 34

• Manufacturer Part Number: dp83261
• Description: Bmac Device Fddi Media Access Controller
• Manufacturer: National Semiconductor Corporation

6 0 Control Information
Current Receiver Status Register (CRS0)
The Current Receiver Status Register (CRS0) records the status of the Receiver state machine It is continuously updated It
remains stable when accessed
When in Diagnose Mode this register is frozen on an internal error until the internal error event is cleared by resetting the
RSMERR bit in the Internal Event Latch Register
ACCESS RULES
REGISTER BITS
D0 – 2
D3
D4 – 6
D7
Bit
RFLG
D7
Address
0Ch
RS2
RTS(0 – 2)
RES
RS(0 – 2)
RFLG
D6
Symbol
RS1
Always
D5
Read
Receive Timing State RTS(0 – 2) represent the current state of the Receiver Timing state
machine The encoding is shown below
Reserved
Receive State RS(0 – 2) represent the current state of the Receive state machine that
implements the ANSI standard MAC Receive Functions The encoding is shown below
R Flag Current value of the Restricted Flag When not holding the token indicates the type of
the last valid token received When holding the token indicates the type of token that will be
issued at the end of the current service opportunity
0 Non-restricted
1 Restricted
RS0
D4
RTS2
RS2
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
(Continued)
Data Ignored
RES
D3
Write
RTS1
RS1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
RTS2
D2
RTS0
RS0
RTS1
34
1
1
0
1
0
1
x
0
1
0
1
0
1
0
1
D1
Description
RTS0
Receive Timing State
Await SD
Check FC
Check SA
Check DA
Check INFO
Check MAC
Reserved
Receive State
Listen
Await SD
RC FR CTRL (Receive FC)
RC FR BODY (Rec FR Body)
RC FR STATUS (A
CHECK TOKEN (Check Token)
RC FR STATUS (Optional Ind)
Reserved
D0
C Ind)