lan9311 Standard Microsystems Corp., lan9311 Datasheet - Page 153

• Manufacturer Part Number: lan9311
• Description: Lan9311/lan9311i Two Port 10/100 Managed Ethernet Switch With 16-bit Non-pci Cpu Interface
• Manufacturer: Standard Microsystems Corp.

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
10.2.4.4.2
10.2.4.4.3
10.2.4.5
The
defaults as detailed in
(PHY_AN_ADV_x)," on page
The
as detailed in
page
The
as detailed in
page
negotiation using the new default values of the
(PHY_AN_ADV_x)
Note: Each of these PHY registers is written in its entirety, overwriting any previously changed bits.
Some PHY register defaults are based on configuration straps. In order to maintain consistency
between the updated configuration strap registers and the Virtual PHY registers, the
Negotiation Advertisement Register
( V P H Y _ S P E C I A L _ C O N T R O L _ S TAT U S )
(VPHY_BASIC_CTRL)
The
defaults as detailed in
(VPHY_AN_ADV)," on page
The
with the new defaults as detailed in
(VPHY_SPECIAL_CONTROL_STATUS)," on page
The
detailed in
Additionally, the Restart Auto-negotiation bit is set in this register. This re-runs the Auto-negotiation
using the new default values of the
(VPHY_AN_ADV)
Note: Each of these VPHY registers is written in its entirety, overwriting any previously changed bits.
Since the defaults of the
(MANUAL_FC_1),
Manual Flow Control Register (MANUAL_FC_MII)
Loader reloads these registers with their new default values.
Register Data
Optionally following the configuration strap values, the EEPROM data may be formatted to allow
access to the LAN9311/LAN9311i parallel, directly writable registers. Access to indirectly accessible
registers (e.g. Switch Engine registers, etc.) is achievable with an appropriate sequence of writes (at
the cost of EEPROM space).
This data is first preceded with a Burst Sequence Valid Flag (EEPROM byte 12). If this byte has a
value of A5h, the data that follows is recognized as a sequence of bursts. Otherwise, the EEPROM
Loader is finished, will go into a wait state, and clear the EPC_BUSY bit in the
Register
The data at EEPROM byte 13 and above should be formatted in a sequence of bursts. The first byte
is the total number of bursts. Following this is a series of bursts, each consisting of a starting address,
count, and the count x 4 bytes of data. This results in the following formula for formatting register data:
LED AND MANUAL FLOW CONTROL REGISTER SYNCHRONIZATION
VIRTUAL PHY REGISTERS SYNCHRONIZATION
Port x PHY Special Modes Register (PHY_SPECIAL_MODES_x)
Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)
Port x PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
Virtual PHY Special Control/Status Register (VPHY_SPECIAL_CONTROL_STATUS)
Virtual PHY Basic Control Register (VPHY_BASIC_CTRL)
303.
290. Additionally, the Restart Auto-negotiation bit is set in this register. This re-runs the Auto-
(E2P_CMD). This can optionally generate an interrupt.
Section 14.2.8.1, "Virtual PHY Basic Control Register (VPHY_BASIC_CTRL)," on page
Section 14.4.2.9, "Port x PHY Special Modes Register (PHY_SPECIAL_MODES_x)," on
Section 14.4.2.1, "Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)," on
register to determine the new Auto-negotiation results.
register to determine the new Auto-negotiation results.
Port 2 Manual Flow Control Register
are written when the EEPROM Loader is run.
LED Configuration Register
Section 14.4.2.5, "Port x PHY Auto-Negotiation Advertisement Register
Section 14.2.8.5, "Virtual PHY Auto-Negotiation Advertisement Register
253.
296.
DATASHEET
(VPHY_AN_ADV),
Section 14.2.8.8, "Virtual PHY Special Control/Status Register
Virtual PHY Auto-Negotiation Advertisement Register
153
, a n d
Port x PHY Auto-Negotiation Advertisement Register
258.
are based on configuration straps, the EEPROM
(LED_CFG),
V i r t u a l P H Y B a s i c C o n t r o l R e g i s t e r
Virtual PHY Special Control/Status Register
(MANUAL_FC_2), and
Port 1 Manual Flow Control Register
is written with the new defaults as
is written with the new defaults
is written with the new defaults
is written with the new
is written with the new
EEPROM Command
Revision 1.2 (04-08-08)
Port 0(Host MAC)
Virtual PHY Auto-
is written
247.