lan9311 Standard Microsystems Corp., lan9311 Datasheet - Page 19

• Manufacturer Part Number: lan9311
• Description: Lan9311/lan9311i Two Port 10/100 Managed Ethernet Switch With 16-bit Non-pci Cpu Interface
• Manufacturer: Standard Microsystems Corp.

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
1.3
REGISTER BIT TYPE
RESERVED
NOTATION
RO/LH
NASR
WAC
WO
WC
RO
RC
SC
LH
SS
LL
W
R
Table 1.2
Many of these register bit notations can be combined. Some examples of this are shown below:
Register Nomenclature
R/W: Can be written. Will return current setting on a read.
R/WAC: Will return current setting on a read. Writing anything clears the bit.
describes the register bit attribute notation used throughout this document.
Read: A register or bit with this attribute can be read.
Read: A register or bit with this attribute can be written.
Read only: Read only. Writes have no effect.
Write only: If a register or bit is write-only, reads will return unspecified data.
Write One to Clear: writing a one clears the value. Writing a zero has no effect
Write Anything to Clear: writing anything clears the value.
Read to Clear: Contents is cleared after the read. Writes have no effect.
Latch Low: Clear on read of register.
Latch High: Clear on read of register.
Self-Clearing: Contents are self-cleared after the being set. Writes of zero have no
effect. Contents can be read.
Self-Setting: Contents are self-setting after being cleared. Writes of one have no
effect. Contents can be read.
Read Only, Latch High: Bits with this attribute will stay high until the bit is read. After
it is read, the bit will either remain high if the high condition remains, or will go low if
the high condition has been removed. If the bit has not been read, the bit will remain
high regardless of a change to the high condition. This mode is used in some Ethernet
PHY registers.
Not Affected by Software Reset. The state of NASR bits do not change on assertion
of a software reset.
Reserved Field: Reserved fields must be written with zeros to ensure future
compatibility. The value of reserved bits is not guaranteed on a read.
Table 1.2 Register Bit Types
DATASHEET
REGISTER BIT DESCRIPTION
19
Revision 1.2 (04-08-08)