peb20532 Infineon Technologies Corporation, peb20532 Datasheet - Page 153

• Manufacturer Part Number: peb20532
• Description: 2 Channel Serial Optimized Communication Controller
• Manufacturer: Infineon Technologies Corporation

Data Sheet
TOE
SSEL
CM(2:0)
PU
Transmit Clock Out Enable
For clock modes 0b, 2b, 3a, 3b, 6b, 7a and 7b, the internal transmit clock
can be monitored on pin TxCLK as an output signal. In clock mode 5, a
time slot control signal marking the active transmit time slot is output on
pin TxCLK.
Bit ’TOE’ is invalid for all other clock modes.
TOE=’0’
TOE=’1’
Clock Source Select
Distinguishes between the ’a’ and ’b’ option of clock modes 0, 2, 3, 5, 6
and 7.
SSEL=’0’
SSEL=’1’
Clock Mode
This bit field selects one of main clock modes 0..7. For a detailed
description of the clock modes refer to
CM = ’000’
CM = ’001’
CM = ’010’
CM = ’011’
CM = ’100’
CM = ’101’
CM = ’110’
CM = ’111’
Power Up
PU=’0’
PU=’1’
TxCLK pin is input.
TxCLK pin is switched to output function if applicable for
the selected clock mode.
Option ’a’ is selected.
Option ’b’ is selected.
clock mode 0
clock mode 1
clock mode 2
clock mode 3
clock mode 4
clock mode 5 (time-slot oriented clocking modes)
clock mode 6
clock mode 7
The SCC is in ’power-down’ mode. The protocol engines
are switched off (standby) and no operation is performed.
This may be used to save power when SCC is not in use.
Note: The SCC transmit FIFO accepts transmit data even
The SCC is in ’power-up’ mode.
in ’power-down’ mode.
5-153
Chapter 3.2.3
Register Description (CCR0H)
PEB 20532
PEF 20532
(all modes)
(all modes)
(all modes)
(all modes)
2000-09-14