peb20532 Infineon Technologies Corporation, peb20532 Datasheet - Page 26

• Manufacturer Part Number: peb20532
• Description: 2 Channel Serial Optimized Communication Controller
• Manufacturer: Infineon Technologies Corporation

1.4
This chapter is useful for all being familiar with the ESCC family.
1.4.1
The SEROCCO-M SCC cores contain the core logic of the ESCC as the heart of the
device. Some enhancements are incorporated in the SCCs. These are:
• Octet-, Bit Synchronous and Asynchronous PPP protocol support as in RFC-1662
• Signaling System #7 (SS7) support
• 4-kByte packet length byte counter
• Enhanced address filtering (16-bit maskable)
• Enhanced time slot assigner
• Support of high data rates (16 Mbit/s)
1.4.2
The following features of the ESCC core have been removed:
• Extended transparent mode 0
• Support of interrupt acknowledge cycles
• Master clock mode
Data Sheet
(this mode provided octet buffered data reception without usage of FIFOs;
SEROCCO-M supports octet buffered reception via appropriate threshold
configurations for the SCC receive FIFOs)
Differences between SEROCCO-M and the ESCC Family
Enhancements to the ESCC Serial Core
Simplifications to the ESCC Serial Core
26
Introduction
PEB 20532
PEF 20532
2000-09-14