peb20532 Infineon Technologies Corporation, peb20532 Datasheet - Page 180

• Manufacturer Part Number: peb20532
• Description: 2 Channel Serial Optimized Communication Controller
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Register 35
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 36
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
H
A
B
H
A
B
7
0
0
7
0
0
UDAC0
User Defined PPP ASYNC Control Character Map 0
UDAC1
User Defined PPP ASYNC Control Character Map 1
6
0
0
6
0
0
read/write
7E
Channel A
24
written by CPU;
read and evaluated by SEROCCO-M
read/write
7E
Channel A
25
written by CPU;
read and evaluated by SEROCCO-M
H
H
H
H
5
0
0
5
0
0
Channel B
74
Channel B
75
ASYNC Character 0
ASYNC Character 1
H
H
5-180
4
0
0
4
0
0
AC0
AC1
3
0
0
3
0
0
Register Description (UDAC0)
2
2
0
0
0
0
1
1
0
0
0
0
PEB 20532
PEF 20532
2000-09-14
0
0
0
0
0
0