peb20532 Infineon Technologies Corporation, peb20532 Datasheet - Page 201

• Manufacturer Part Number: peb20532
• Description: 2 Channel Serial Optimized Communication Controller
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Register 61
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 62
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
H
A
B
H
A
B
7
0
0
7
0
0
XAD1
Transmit Address 1 Register
XAD2
Transmit Address 2 Register
6
0
0
6
0
0
read/write
00
Channel A
3E
written by CPU; read and evaluated by SEROCCO-M
read/write
00
Channel A
3F
written by CPU; read and evaluated by SEROCCO-M
H
H
H
H
XAD1 (high byte)
5
0
0
5
0
0
Channel B
8E
Channel B
8F
Transmit Address (high)
or XAD2 (RESPONSE)
Transmit Address (low)
or XAD1 (COMMAND)
H
H
XAD2 (low byte)
5-201
4
0
0
4
0
0
3
0
0
3
0
0
Register Description (XAD1)
2
2
0
0
0
0
1
1
0
0
0
0
0
PEB 20532
PEF 20532
2000-09-14
XAD1_0
0
0
0
0
0
0