w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 46

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w83l950d

Manufacturer Part Number
w83l950d
Description
Peripheral Personal Computer Keyboard Controller
Manufacturer
Winbond Electronics Corp America
Datasheet

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10.6 Serial IRQ Select Register 1(SIRQ1)
10.7 Serial IRQ Select Register 2(SIRQ2)
10.8 Data Bus Buffer 0 Address Low Register (DBB0ADDL)
10.9 Data Bus Buffer 0 Address High Register (DBB0ADDH)
10.10 Data Bus Buffer 1 Address Low Register (DBB1ADDL)
These two registers are only available in LPC mode, which be used to specify the DBB0 base I/O
address. Then the available I/O ports are at base and base+4h.
Default is {00h, 60h}, so available decode address for DBB0 are 60h and 64h.
ASFR address 0x00
Default value
The SIRQ1 register is used for LPC mode of DBB interface.
Bit 7-4: These bits select SERIRQ IRQ SOURCE for OBF01. Default is IRQ12.
Bit 3-0: These bits select SERIRQ IRQ SOURCE for OBF00. Default is IRQ1.
ASFR address 0x01
Default value
The SIRQ2 register is used for LPC mode of DBB interface.
Bit 7: GP46 function as OBF10 in LPC interface.
Bit 6: OBF10 output mode select.
Bit 5-4: Reserved. (Should be program to 0.)
Bit 3-0: These bits select SERIRQ IRQ SOURCE for OBF10. Default is IRQ11.
ASFR address 0x02
Default value
ASFR address. 0x03
Default value.
ASFR address 0x04
Default value
=0: The output of GP46 is OBF10.
=0: The output of GP46 is five system clock open drain low pulse according the OBF10
rising,
0xc1
0x0b
0x60
0x00
0x62
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Publication Release Date: June 23, 2003
W83L950D
Revision 1.0

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