w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 60
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w83l950d
Manufacturer Part Number
w83l950d
Description
Peripheral Personal Computer Keyboard Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83L950D.pdf
(105 pages)
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Receive enable signal SRDY1
buffer register (address 0018
Write pulse to receive/transmit
Transfer shift clock
(1/2 to 1/2048 of the internal
clock,or an external clock)
13.1.2 Asynchronous Serial I/O (UART) Mode
Universal asynchronous serial I/O mode (UART) can be selected by clearing the serial I/O1 mode
selection bit of the serial I/O1 control register to 0.
Eight serial data transfer formats can be selected, for vary selection of Stop bit, Parity, Parity check,
Data length, and the transfer formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer, but the two buffers have the same address
in memory. Since the shift register cannot be written to or read from directly, transmit data is written to
the transmit buffer register, and receive data is read from the receive buffer register. The transmit buffer
register can also hold the next data to be transmitted, and the receive buffer register can hold a byte
while the next byte is being received.
Serial output TxD
Serial input RxD
16
)
TBE=0
Fig.12.2 Clock Synchronous Serial I/O 1 Mode Operation
D0
D0
D1
D1
D2
D2
- 51 -
D3
D3
Publication Release Date: June 23, 2003
D4
D4
D5
D5
W83L950D
D6
D6
RBF=1
TSC=0
Overrun error (OE)
detection
Revision 1.0
D7
D7
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