w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 63
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w83l950d
Manufacturer Part Number
w83l950d
Description
Peripheral Personal Computer Keyboard Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83L950D.pdf
(105 pages)
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13.1.5 Serial I/O 1 control register (SIO1CON)
13.1.6 UART control register (UARTCON)
SFR address
Default value
The serial I/O1 control register consists of eight control bits for the serial I/O function.
Bit 7: Serial I/O1 enable bit (SIOE)
Bit 6: Serial I/O1 mode selection bit (SIOM)
Bit 5: Receive enable bit (RE)
Bit 4: Transmit enable bit (TE)
Bit 3: Transmit interrupt source selection bit (TIC)
Bit 2:
Bit 1: Serial I/O 1 synchronous clock selection bit (SCS)
Bit 0: BRG count source selection bit (CSS).
SFR address
Default value
Bit 7-5: No used (return 1 when read)
Bit 4: TxD 0/1 output structure bit
SRDY
= 1: Serial I/O enabled
= 1: Clock synchronous serial I/O.
= 1: Receive enable.
= 1: Transmit enable.
= 1: interrupt when transmit shift operation is completed.
= 1: P47 pin operates as
= 1 External clock input when clock synchronous serial I/O is selected.
= 0: Serial I/O disable.
= 0: Clock asynchronous (UART) serial I/O.
= 0: Receive disabled.
= 0: Transmit disabled.
= 0: interrupt when transmit buffer has emptied.
= 0: P47 pin operates as ordinary I/O pin.
= 0 BRG output will divided by 4 when clock synchronous serial I/O is
= 0: f(XIN) ( f(Xcin) in low sped mode )
= 1: f(XIN) / 4 ( f(Xcin) / 4 in low sped mode )
= 0: CMOS output.
selected. BRG output will divided by 16 when UART is selected.
External clock input divided by 16 when UART is selected.
1
output enable bit (SRDY)
0xCA
0x00
0xCB
0xE0
SRDY
1
- 54 -
pin.
W83L950D
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