w83l950d Winbond Electronics Corp America, w83l950d Datasheet - Page 8

• Manufacturer Part Number: w83l950d
• Description: Peripheral Personal Computer Keyboard Controller
• Manufacturer: Winbond Electronics Corp America

18.
19.
20.
21.
17.2
WATCHDOG TIMER ................................................................................................................. 65
17.1.
17.2.
17.3.
17.4.
17.5.
FLASH MEMORY...................................................................................................................... 67
19.1
19.2
PS/2 DEVICE INTERFACE....................................................................................................... 70
20.1
20.2
20.3
20.4
SMBUS ADDRESS AND REGISTERS..................................................................................... 74
21.1
21.2
21.3
21.4
21.5
21.6
21.7
21.8
21.9
Comparator Data Register (CMPD).............................................................................. 65
On chip program flash memory .................................................................................... 67
19.1.1
18.1.1
18.1.2
External Programming Mode ........................................................................................ 67
PS/2 Transmit and Receive DATA Registers (PS2DATA)............................................. 70
20.1.1
20.1.2
PS/2 Control Registers (PS2CON) ............................................................................... 71
PS/2 Status Registers (PS2STS).................................................................................. 72
PS/2 Status_2 Registers (PS2STS_2).......................................................................... 73
SMBus Host Status Register (HSR) ............................................................................. 74
SMBus Host Control Register (HCR)............................................................................ 75
SMBus Host Read Byte Count Register (H_RBC) ....................................................... 76
SMBus Host/Slave Data FIFO Register (DFIFO) ......................................................... 76
SMBus Host-Slave Address Register (SADR).............................................................. 76
SMBus Host/Slave Mode and FIFO Level Length Register (HMR).............................. 77
SMBus Host/Slave FIFO Control Register (FCR)......................................................... 77
SMBus Host/Slave interrupt Control Register (ICR)..................................................... 78
SMBus Host/Slave interrupt Status Register (ISR)....................................................... 79
Standard Operation of Watchdog Timer ...................................................................... 65
Initial Value of Watchdog Timer ................................................................................... 65
Watchdog Timer H Count Source Selection Bit Operation.......................................... 65
IDLE Mode Disable Bit ................................................................................................ 66
Watchdog timer control register (WDTCON)............................................................... 66
SFRAH, SFRAL(0F9h, 0F8h) .......................................................................................67
SFRFD (0FAh)..............................................................................................................67
SFRCN (0FBh) .............................................................................................................67
Transmit Register .........................................................................................................70
Receive Register ..........................................................................................................70
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W83L950D