saa6703ah NXP Semiconductors, saa6703ah Datasheet - Page 50

• Manufacturer Part Number: saa6703ah
• Description: Xga Analog Input Flat Panel Controller.
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Additionally, the mode detection interrupt can be
generated on the falling edge of every vsync, which is
enabled if vsync_int_en is set to logic 1.
The states of each interrupt condition vsync_int, jitter_int,
vsync_pol_int, hsync_pol_int, no_vsync_int,
no_hsync_int, v_lines_int, h_clocks_int and v_clocks_int
can be read out at registers MD_INT_HI and MD_INT_LO
(0AH and 0BH). Whenever an interrupt condition is met,
the particular flag is set to logic 1. If clear_int at MD_CTRL
(00H) is programmed with logic 1, all interrupt flags are
cleared.
If int_lock is set to logic 1, all flags and values are frozen in
the moment an interrupt occurs until clear_int is set to
logic 1 the next time.
7.10.2
Activity detection for AVI horizontal and vertical sync is
provided. Moreover, the vertical sync output of the CSYNC
slicer and the sync-on-green signal from the sync
separator are checked permanently for activity. An
interrupt may be generated on any change of activity.
Interrupts can be masked with a set of interrupt enable
bits. Writing a logic 1 to the existing clear_int bit will clear
this interrupts.
For activity bits, logic 0 means inactive and logic 1 means
active. For sync interrupt bits, logic 0 means disabled and
logic 1 means enabled. For sync active interrupt bits,
logic 0 means no interrupt and logic 1 means interrupt
pending.
The sync-on-green activity detection is only an indicator
that the digital output of the sync slicer is active. The
line-locked PLL with its lock flag should be used to
distinguish a real sync-on-green from disturbances
resulting from the image data on the green channel.
Table 30 Line PLL lock
2004 Apr 01
XGA analog input flat panel controller
llpll_inlock
S
0
1
YNC ACTIVITY DETECTION
line PLL out-of-lock
line PLL in lock
FUNCTION
50
7.10.3
There are four auto-adjustment modes:
The programming registers for all four modes are shared.
Bit aa_mode selects the auto-adjustment mode according
to Table 31.
Table 31 Auto-adjustment modes
In each mode, reference colours or reference coordinates
have to be programmed (into bits ref_colour_0,
ref_colour_1 or ref_row_0, ref_col_0, ref_row_1, ref_col_1
respectively). The auto-adjustment is activated by writing
to the AA_CTRL register and started synchronized to the
beginning of the next frame. The function is then applied
for a number of frames defined in aa_cycles. After
performing the auto-adjustment for this number of frames,
an interrupt can be generated. The different aa-functions
have two further aa_submode bits to control the
functionality of each auto-adjustment mode.
7.10.3.1
With the active area detection feature it is possible to
measure the number of blanking pixels and lines between
the synchronization pulses and the active video.
To distinguish between blanking and active video the
threshold colour values ref_colour_0 and ref_colour_1
have to be defined. Parameter ref_colour_0 is used to
determine the start of the active video area. If the sample
value of at least one of the three colour components is
above this value the pixel is treated as upper left corner of
active video.
aa_mode[1:0]
Active area detection
Brightest and lowest pixel search
Pixel measurement
Phase distortion measurement.
00
01
10
11
A
UTO
Active area detection
-
ADJUSTMENT
active area detection
brightest and lowest pixel search
pixel measurement
phase distortion measurement
FUNCTION
SAA6703AH
Product specification