saa6703ah NXP Semiconductors, saa6703ah Datasheet - Page 60

• Manufacturer Part Number: saa6703ah
• Description: Xga Analog Input Flat Panel Controller.
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Different property register write modes can be selected,
allowing to accelerate the I
windows with characters sharing the contents of one or
more property registers. Parameter write_mode of register
OSDT_MASK (see Table 39) controls which of the three
property registers OSDT_PROP2 to OSDT_PROP0 have
to be updated until the character information is internally
written into the window RAM. The registers are activated
by write_mode according to Table 41. Only once all
activated registers have been updated via the I
character is written into the window RAM and the cursor
position defined by OSDT_CURX and OSDT_CURY is
advanced to the next window element. The information of
an inactive property register is still included in the
character definition, but the register does not have to be
rewritten for every new character definition.
Example 1: for a single-coloured ASCII character-based
OSD, write_mode is set to ‘001’ and property registers
OSDT_PROP2 and OSDT_PROP1 have only to be
defined initially, all window elements are then defined by
consecutive writing of OSDT_PROP0. With every write
operation to OSDT_PROP0 a new window element is
defined.
The I
property registers specified by parameter write_mode as
Table 39 OSDT_MASK register
Table 40 OSDT_MASK register bit description
2004 Apr 01
OSDT_MASK blink_mask shadow_mask bg_mask
blink_mask
shadow_mask
bg_mask
fg_mask
code_mask
write_mode[2:0]
REGISTER
XGA analog input flat panel controller
2
C-bus burst access is also supported for the
BIT
D7
1: blink[1:0] property will be written according to actual OSDT_PROP2 settings
0: blink[1:0] property will not be modified
1: shadow property will be written according to actual OSDT_PROP2 settings
0: shadow property will not be modified
1: all background information will be written according to actual property settings (OSDT_PROP2:
bg_trans, bg_alpha and OSDT_PROP1: bg_colour)
0: the background property will not be modified
1: all foreground information will be written according to actual property settings (OSDT_PROP2:
fg_trans, fg_alpha and OSDT_PROP1: fg_colour)
0: the foreground property will not be modified
1: the charcode property will be written according to actual property settings (OSDT_PROP1:
ROM, charcode[8] and OSDT_PROP0: charcode[7:0])
0: the charcode property will not be modified
write mode selection (see Table 41)
2
C-bus programming of OSD
D6
2
C-bus, the
D5
fg_mask
60
specified in Table 41. The active property register values
of consecutive window elements can be transmitted in the
I
device addressing and the transmission of the subaddress
for every character or property register.
Example 2: for a multi-coloured OSD, write_mode is set
to 6 to activate only OSDT_PROP1 and OSDT_PROP0.
OSDT_PROP2 is set initially. The OSD can then be
programmed with one I
device addressing byte, the OSDT_PROP1 subaddress
followed by OSDT_PROP1 value of first character,
OSDT_PROP0 value of first character, OSDT_PROP1
value of second character, OSDT_PROP0 value of
second character, OSDT_PROP1 value of third character
etc. After each transmission of an OSDT_PROP0 value
the character definition is transferred into the window
RAM. The masking bits (see Table 40) are used as a data
filter that specifies which parts of the complete
OSDT_PROP word (23 bits) are written to the RAM and
which are masked out. Each attribute will only be updated
in the OSD text window RAM element if its mask bit is set
to logic 1. If that is not the case, the window RAM will
ignore this part of the OSDT_PROP register and will keep
up its previously defined value for this part at the selected
OSD text window element.
2
DESCRIPTION
D4
C-bus burst mode without the requirement of repeating
code_mask write_mode[2:0]
D3
2
C-bus write burst consisting of
D2
SAA6703AH
Product specification
D1
D0