x3102v28 Intersil Corporation, x3102v28 Datasheet - Page 13

• Manufacturer Part Number: x3102v28
• Description: 3 Cell Li-ion Battery Protection And Monitor Ic
• Manufacturer: Intersil Corporation

The capacitors on the V
a first order low pass filter configuration, at the battery cell
voltage monitoring inputs (VCELL1–VCELL4) of the X3102.
This filter is used to block any unwanted interference signals
from being inadvertently injected into the monitor inputs.
These interference signals may result from:
• Transients created at battery contacts when the battery
• Electrostatic discharge (ESD) from something/someone
• Unfiltered noise that exists in the host device.
• RF signals which are induced into the battery pack from
Such interference can cause the X3102 to operate in an
unpredictable manner, or in extreme cases, damage the
device. As a guide, the capacitor should be in the order of
0.01µF and the resistor, should be in the order of 10K:
capacitors should be of the ceramic type. In order to
minimize interference, PCB tracks should be made as short
and as wide as possible to reduce their impedance. The
battery cells should also be placed as close to the X3102
monitor inputs as possible.
Resistors R
(Q
X3102 provides internal drive circuitry which allows the user
to switch FETs Q
and SPI port (See section “Cell Voltage Balance Control
(CBC1–CBC3)” on page 17). When any of the these FETs
are switched ON, a current, limited by resistor R
across the particular battery cell. In doing so, the user can
control the voltage across each individual battery cell. This is
important when using Li-Ion battery cells since imbalances in
cell voltages can, in time, greatly reduce the usable capacity
of the battery pack. Cell voltage balancing may be
implemented in various ways, but is usually performed
towards the end of cell charging (“Top-of-charge method”).
Values for R
The internal 4kbit EEPROM memory can be used to store
the cell characteristics for implementing such functions as
gas gauging, battery pack history, charge/discharge cycles,
and minimum/maximum conditions. Battery pack
manufacturing data as well as serial number information can
also be stored in the EEPROM array. An SPI serial bus
provides the communication link to the EEPROM.
A current sense resistor (R
monitor the current flowing into/out of the battery terminals,
and is used to protect the pack from overcurrent conditions
(See section “Overcurrent Protection” on page 23). R
is also used to externally monitor current via a
microcontroller (See section “Current Monitor Function” on
page 25).
pack is being connected/disconnected from the charger or
the host.
touching the battery contacts.
the surrounding environment.
6
–Q
9
) are used for battery cell voltage balancing. The
CB
CB
and the associated n-channel MOSFET’s
will vary according to the specific application.
6
–Q
9
ON or OFF via the microcontroller
CELL1
SENSE
13
to V
) is used to measure and
CELL4
inputs are used in
CB
, flows
SENSE

The
X3102
FETs Q4 and Q5 may be required on general purpose I/Os
of the microcontroller that connect outside of the package. In
some cases, without FETs, pull-up resistors external to the
pack force a voltage on the V
during a pack sleep condition. This voltage can affect the
proper tuned voltage of the X3102 regulator. These FETs
should be turned-on by the microcontroller. (See Figure 1.)
Power On Sequence
Initial connection of the Li-Ion cells in the battery pack will
not normally power up the battery pack. Instead, the X3102
enters and remains in the SLEEP mode. To exit the SLEEP
mode, after the initial power up sequence, or following any
other SLEEP MODE, a minimum of 8.5V is applied to the
VCC pin, as would be the case during a battery charge
condition. (See Figure 8.)
When V
AS0) and the SPI communication pins (CS, CLK, SI, SO)
must be low, so the X3102 powers up correctly into the
normal operating mode. This can be done by using a power-
on reset circuit.
When entering the normal operating mode, either from initial
power up or following the SLEEP MODE, all bits in the
control register are zero. With UVPC and OVPC bits at zero,
the charge and discharge FETs are off. The microcontroller
must turn these on to activate the pack. The microcontroller
would typically check the voltage and current levels prior to
turning on the FETs via the SPI port. The software should
prevent turning on the FETs throughout an initial
measurement/calibration period. The duration of this period
is T
OV
+ 200ms or T
SLR
is applied to VCC, the analog select pins (AS2–
UV
+ 200ms, whichever is longer.
CC
pin of the microcontroller
December 22, 2004
FN8246.0