x3102v28 Intersil Corporation, x3102v28 Datasheet - Page 20

• Manufacturer Part Number: x3102v28
• Description: 3 Cell Li-ion Battery Protection And Monitor Ic
• Manufacturer: Intersil Corporation

Over-discharge Protection
If V
to be in a over-discharge state (Figure 12). In this instance,
the X3102 automatically switches the discharge FET OFF
(UVP/OCP=Vcc), and then enter sleep mode.
The over-discharge (undervoltage) value, V
selected from the values shown in Table 5 by setting bits
VUV1, VUV0 in the configuration register. These bits are set
using the WCFIG command. Once in the sleep mode, the
following steps must occur before the X3102 allows the
battery cells to discharge:
• The X3102 must wake from sleep mode (See section
• The charge FET must be switched ON by the
• All battery cells must satisfy the condition: V
• The discharge FET must be switched ON by the
The times T
connected between pin UVT and GND (Table 13). The delay
EVENT
“Voltage Regulator” on page 26).
microcontroller (OVP/LMON=V
(See section “CONTROL REGISTER FUNCTIONALITY”
on page 17).
for a time exceeding T
microcontroller (UVP/OCP=V
(See section “CONTROL REGISTER FUNCTIONALITY”
on page 17)
[0,1)
(1,2)
(2,3)
CELL
[1]
[2]
[3]
< V
• Discharge FET is ON (UVP/OCP=V
• Charge FET is ON (OVP/LMON=V
• All cell voltages (V
• The device is in normal operation mode (i.e. not in a protection mode).
• The voltage of one or more of the battery cells (V
• The internal over-charge detection delay timer begins counting down.
• The device is still in normal operation mode
The internal over-charge detection delay timer continues counting for T
The internal over-charge detection delay timer times out
AND
V
• Therefore, the internal over-charge sense circuitry switches the charge FET OFF (OVP/LMON=Vcc).
• The device has now entered over-charge protection mode.
• While in over-charge protection mode:
• The battery cells are permitted to discharge via the discharge FET, and diode D
• The X3102 monitors the voltages V
• (It is possible to change the status of UVP/OCP or OVP/LMON using the control register)
• All cell voltages fall below V
• The X3102 automatically switches charge FET = ON (OVP/LMON = Vss)
• The status of the discharge FET remains unaffected.
• Charging of the battery cells can now resume.
UV
CELL
UV
charge threshold” (V
/T
, for a time exceeding T
UVR
still exceeds V
are varied using a capacitor (C
UVR
TABLE 20. OVER-CHARGE PROTECTION MODE-EVENT DIAGRAM DESCRIPTION
20
.
CELL
OV.
SS
OVR
SS
), via the control register
– V
).
), via the control register
CELL4
OVR
UV
—The device is now in normal operation mode.
, the cells are said
) are below the over-charge voltage threshold (V
UV
SS
CELL1
SS
, can be
), and hence battery cells are permitted to receive charge.
CELL
).
- V
UV
> V
CELL4
)
UVR
CELL
to determine whether or not they have all fallen below the “Return from over-
EVENT DESCRIPTION
X3102
), exceeds V
T
approximated by the following linear equation:
T
T
Sleep Mode
The X3102 can enter sleep mode in two ways:
i)
ii) The user sends the device into sleep mode using the con-
A sleep mode can be induced by the user, by setting the SLP
bit in the control register (Table 13) using the WCNTR
Instruction.
In sleep mode, power to all internal circuitry is switched off,
minimizing the current drawn by the device to 1µA (max). In
this state, the discharge FET and the charge FET are
switched OFF (OVP/LMON=V
the 5VDC regulated output (V
SYMBOL
UV
UV
UVR
OV
T
T
The device enters the over-discharge protection mode.
trol register.
TABLE 21. TYPICAL OVER-DISCHARGE DELAY TIMES
OV
UVR
that results from a particular capacitance C
(s) |10 x C
UV
.
(ms) |70 x C
seconds.
Over-discharge
detection delay
Over-discharge release
time
2
across the charge FET
DESCRIPTION
UV
OV
).
(µF)
UV
(µF)
RGO
CC
and UVP/OCP=V
) is 0V. Control of
0.1µF
0.1µF
C
UV
UV
December 22, 2004
, can be
1.0s (Typ)
7ms (Typ)
DELAY
CC
), and
FN8246.0