x3102v28 Intersil Corporation, x3102v28 Datasheet - Page 29

• Manufacturer Part Number: x3102v28
• Description: 3 Cell Li-ion Battery Protection And Monitor Ic
• Manufacturer: Intersil Corporation

EEPROM Read Sequence (EEREAD)
When reading from the X3102 EEPROM memory, CS is first
pulled LOW to select the device. The 8-bit EEREAD instruction
is transmitted to the X3102, followed by the 16-bit address,
of which the last 9 bits are used (bits [15:9] specified to be
zeroes). After the EEREAD opcode and address are sent, the
data stored in the memory at the selected address is shifted
out on the SO line. The data stored in memory at the next
address can be read sequentially by continuing to provide
clock pulses. The address is automatically incremented to the
next higher address after each byte of data is shifted out.
When the highest address is reached (01FFh), the address
counter rolls over to address 0000h, allowing the read cycle
SCK
CS
SO
SCK
SCK
SI
CS
CS
SI
SI
32
7
33
0
6
0
EEREAD STAT
Instruction
FIGURE 20. EEPROM READ STATUS (EEREAD STAT) OPERATION SEQUENCE
34
1
5
1
Data Byte 2
29
35
2
FIGURE 19. EEPROM PAGE WRITE (EEWRITE) OPERATION SEQUENCE
4
Nonvolatile EEWRITE in Progress
2
EEWRITE
Instruction
36
3
3
3
37
4
2
4
38
5
1
5
39
6
0
6
40
7
7
7
41
6
15
8
SO High During Nonvolatile
42
5
14
X3102
9
EEWRITE Cycle
Data Byte 3
43
4
10
13
Byte Address
44
3
(2 Byte)
to be continued indefinitely. The read operation is terminated
by taking CS HIGH. Refer to the EEPROM Read (EEREAD)
operation sequence illustrated in Figure 21.
Write Configuration Register (WCFIG)
The Write Configuration Register (WCFIG) instruction
updates the static part of the Configuration Register. These
new values take effect immediately, for example writing a
new Over-discharge voltage limit. However, to make these
changes permanent, so they remain if the cell voltages are
removed, an EEWRITE operation to the EEPROM array is
required following the WCFIG command. This command is
shown in Figure 22.
45
2
20
3
46
1
21
2
47
0
22
1
23
0
SO=Status Reg Bit When No Nonvolatile
EEWRITE Cycle
6
24
7
5
25
6
Data Byte 16
4
26
5
3
27
Data Byte 1
4
2
28
3
D
L
2
I
1
29
2
D
L
1
I
0
30
1
D
L
0
I
December 22, 2004
31
0
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FN8246.0