tmp86c847iug TOSHIBA Semiconductor CORPORATION, tmp86c847iug Datasheet - Page 116

• Manufacturer Part Number: tmp86c847iug
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

10.3 Function
10. Synchronous Serial Interface (SIO)
SIOSR<SEF>
SO pin
SIOSR<TXF>
SIOCR1<SIOS>
SIOSR<SIOF>
SCK
INTSIO
interrupt
request
SIOTDB
pin output
(2)
(3)
Figure 10-6 Example of Internal Clock and MSB Transmit Mode
Writing transmit
data A
stops to “H” level by an automatic-wait function when all of the bit set in the SIOTDB has been
transmitted. Automatic-wait function is released by writing a transmit data to SIOTDB. Then, trans-
mit operation is restarted after maximum 1-cycle of serial clock.
SIOSR<TXF> “1”, the next data is continuously transferred after transmission of previous data.
SIOTDB before the shift operation of the next data begins.
tion is started. Then, INTSIO interrupt request is generated after SIOSR<TXERR> is set to “1”.
During the transmit operation
When data is written to SIOTDB, SIOSR<TXF> is cleared to “0”.
In internal clock operation, in case a next transmit data is not written to SIOTDB, the serial clock
When the next data is written to the SIOTDB before termination of previous 8-bit data with
In external clock operation, after SIOSR<TXF> is set to “1”, the transmit data must be written to
If the transmit data is not written to SIOTDB, transmit error occurs immediately after shift opera-
Stopping the transmit operation
There are two ways for stopping transmits operation.
A
• The way of clearing SIOCR1<SIOS>.
• The way of setting SIOCR1<SIOINH>.
When SIOCR1<SIOS> is cleared to “0”, transmit operation is stopped after all transfer of the
data is finished. When transmit operation is finished, SIOSR<SIOF> is cleared to “0” and
SO pin is kept in high level.
In external clock operation, SIOCR1<SIOS> must be cleared to “0” before SIOSR<SEF> is
set to “1” by beginning next transfer.
Transmit operation is stopped immediately after SIOCR1<SIOINH> is set to “1”. In this
case, SIOCR1<SIOS>, SIOSR register, SIORDB register and SIOTDB register are initial-
ized.
A7
Writing transmit
data B
A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1
Start shift
operation
B
Page 108
Start shift
operation
B0
Automatic wait
Writing transmit
data C
C
C7
Start shift
operation
C6 C5 C4 C3 C2 C1 C0
Clearing SIOS
TMP86C847IUG