tmp86c847iug TOSHIBA Semiconductor CORPORATION, tmp86c847iug Datasheet - Page 31

• Manufacturer Part Number: tmp86c847iug
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.2.4.3
timer control register (TBTCR). The following status is maintained during IDLE0 and SLEEP0 modes.
IDLE0 and SLEEP0 modes (IDLE0, SLEEP0)
IDLE0 and SLEEP0 modes are controlled by the system control register 2 (SYSCR2) and the time base
Note: Before starting IDLE0 or SLEEP0 mode, be sure to stop (Disable) peripherals.
1. Timing generator stops feeding clock to peripherals except TBT.
2. The data memory, CPU registers, program status word and port output latches are all held in the
3. The program counter holds the address 2 ahead of the instruction which starts IDLE0 and
status in effect before IDLE0 and SLEEP0 modes were entered.
SLEEP0 modes.
(Normal release mode)
Figure 2-12 IDLE0 and SLEEP0 Modes
No
No
No
No
CPU and WDT are halted
Execution of the instruction
which follows the IDLE0,
Starting IDLE0, SLEEP0
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Stopping peripherals
Interrupt processing
SLEEP0 modes start
modes by instruction
TBTCR<TBTEN>
by instruction
TBT interrupt
source clock
Reset input
IMF = "1"
instruction
enable
falling
= "1"
edge
TBT
Yes
Yes
No
Yes
Yes (Interrupt release mode)
Yes
Reset
TMP86C847IUG