tmp86c847iug TOSHIBA Semiconductor CORPORATION, tmp86c847iug Datasheet - Page 133

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tmp86c847iug

Manufacturer Part Number
tmp86c847iug
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
11.9 Status Flag
11.9.1 Parity Error
11.9.2 Framing Error
11.9.3 Overrun Error
RXD pin
UARTSR<FERR>
INTRXD interrupt
UARTSR<PERR> is set to “1”. The UARTSR<PERR> is cleared to “0” when the RDBUF is read after read-
ing the UARTSR.
The UARTSR<FERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
Shift register
UARTSR<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF are not affected.
The UARTSR<OERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
Shift register
RXD pin
UARTSR<PERR>
INTRXD interrupt
When parity determined using the receive data bits differs from the received parity bit, the parity error flag
When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR<FERR> is set to “1”.
When all bits in the next data are received while unread data are still in RDBUF, overrun error flag
Figure 11-6 Generation of Framing Error
Figure 11-5 Generation of Parity Error
xxxx0 **
xxx0 **
Final bit
Parity
Page 125
pxxxx0
xxxx0
Stop
*
*
Stop
1pxxxx0
0xxxx0
After reading UARTSR then
RDBUF clears FERR.
After reading UARTSR then
RDBUF clears PERR.
TMP86C847IUG

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