tmp86c847iug TOSHIBA Semiconductor CORPORATION, tmp86c847iug Datasheet - Page 117

• Manufacturer Part Number: tmp86c847iug
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

SIOCR1<SIOS>
SIOSR<SIOF>
SIOSR<SEF>
SCK
SO pin
SIOSR<TXF>
INTSIO
interrupt
request
SIOTDB
pin
Writing transmit
data A
SCK
SIOSR<SIOF>
SO pin
Figure 10-7 Example of External Clock and MSB Transmit Mode
(4)
pin
Transmit error processing
Transmit errors occur on the following situation.
A
Figure 10-8 Hold Time of the End of Transmit Mode
• Shift operation starts before writing next transmit data to SIOTDB in external clock opera-
tion.
If transmit errors occur during transmit operation, SIOSR<TXERR> is set to “1” immedi-
ately after starting shift operation. Synchronizing with the next serial clock falling edge,
INTSIO interrupt request is generated.
If shift operation starts before writing data to SIOTDB after SIOCR1<SIOS> is set to “1”,
SIOSR<TXERR> is set to “1” immediately after shift operation is started and then INTSIO
interrupt request is generated.
SO pin is kept in high level when SIOSR<TXERR> is set to “1”. When transmit error
occurs, transmit operation must be forcibly stop by writing SIOCR1<SIOINH> to “1”. In
this case, SIOCR1<SIOS>, SIOSR register, SIORDB register and SIOTDB register are ini-
tialized.
A7 A6
Writing transmit
data B
Start shift
operation
A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 C7 C6 C5 C4 C3 C2 C1 C0
B
Page 109
Writing transmit data
Start shift
operation
Writing transmit
data C
C
4/fc
<
t SODH
t SODH
Start shift
operation
Clearing SIOS
<
8/fc
TMP86C847IUG