W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 118

• Manufacturer Part Number: W83697HFFDC
• Description: LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
• Manufacturer: Information Storage Devices, Inc

Bit 7~4: Reserved.
Bit 3: FAN 2 output value if FANINC2 sets to 0. Write 1, then pin 113 always generate logic high
Bit 2: FAN 2 Input Control. Set to 1, pin 113 acts as FAN clock input, which is default value. Set to 0,
Bit 1: FAN 1 output value if FANINC1 sets to 0. Write 1, then pin 114 always generate logic high
Bit 0: FAN 1 Input Control. Set to 1, pin 114 acts as FAN clock input, which is default value. Set to 0,
9.7.16 Register 50h ~ 5Fh Bank Select Register - Index 4Eh
Register Location:
Power on Default Value
Attribute:
Size:
Bit 7: HBACS- High byte access. Set to 1, access Register 4Fh high byte register.
Bit 6-3: Reserved. This bit should be set to 0.
Bit 2-0: Index ports 0x50~0x5F Bank select.
signal. Write 0, pin 113 always generates logic low signal. This bit default 0.
this pin 113 acts as FAN control signal and the output value of FAN control is set by this register
bit 3.
signal. Write 0, pin 114 always generates logic low signal. This bit default 0.
this pin 114 acts as FAN control signal and the output value of FAN control is set by this register
bit 1.
Set to 0, access Register 4Fh low byte register. Default 1.
7
7
6
6
4Eh
80h
Read/Write
8 bits
5
5
4
4
3
3
2
2
- 109 -
1
1
0
0
FANINC1
FANOPV1
FANINC2
FANOPV2
Reserved
Reserved
Reserved
Reserved
BANKSEL0
BANKSEL1
BANKSEL2
Reserved
Reserved
Reserved
Reserved
HBACS
Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70